ST10F269-T3 STMicroelectronics, ST10F269-T3 Datasheet - Page 147
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
ST10F269-T3
Manufacturer Part Number
ST10F269-T3
Description
Manufacturer
STMicroelectronics
Datasheet
1.ST10F269-T3.pdf
(162 pages)
Specifications of ST10F269-T3
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
32MHz
Interface Type
ASC/I2C/SSC
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Manufacturer
Quantity
Price
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21.4.11 - Demultiplexed Bus
V
ALE cycle time = 4 TCL + 2t
Table 36 : Demultiplexed Bus Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
80
81
12
13
14
15
16
17
18
20
21
22
24
26
28
28h
38
39
DD
Symbol
= 5V ± 10%, V
CC ALE high time
CC Address setup to ALE
CC Address/Unlatched CS setup
CC Address/Unlatched CS setup
CC RD, WR low time
CC RD, WR low time
SR
SR
SR
SR
SR
SR
SR
CC Data valid to WR
CC Data hold after WR
CC ALE rising edge after RD, WR
CC Address/Unlatched CS hold
CC Address/Unlatched CS hold
CC ALE falling edge to Latched
SR
to RD, WR
(with RW-delay)
to RD, WR
(no RW-delay)
RD to valid data in
RD to valid data in
ALE low to valid data in
Address/Unlatched CS to
valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay)
Data float after RD rising
edge (no RW-delay)
after RD, WR
after WRH
CS
Latched CS low to Valid Data
In
(with RW-delay)
(no RW-delay)
(with RW-delay)
(no RW-delay)
SS
Parameter
= 0V, T
2
A
A
+ t
1 - 3
= -40 to +125°C, C
1 - 3
C
+ t
F
(125ns at 32MHz CPU clock without wait states). . RW-delay and
21.25 + 2t
5.625 + 2t
36.875 + t
21.25 + t
11.25 + t
5.625 + t
0.625 + t
5.625 + t
Minimum
Maximum CPU Clock =
0 (no t
(t
-10 + t
-5 + t
-5 + t
-4 - t
F
–
–
–
–
0
–
–
–
> 0)
F
A
F
F
F
)
L
C
C
A
A
F
32MHz
A
A
C
= 50pF,
26.875 + t
26.875 + t
32.5 + 2t
26.875 + t
Maximum
11.25 + t
5.625 + t
26 + t
10 - t
2t
t
t
–
–
–
–
–
–
–
–
–
–
–
–
C
C
A
A
F
A
A
C
C
F
C
+
+
+
2TCL - 10 + 2t
2TCL - 10 + t
3TCL - 10 + t
2TCL- 20 + t
TCL -10 + 2t
TCL - 10+ t
TCL - 15+ t
TCL - 10+ t
Minimum
0 (no t
(t
-10 + t
-5 + t
-5 + t
-4 - t
1/2 TCL = 1 to 32MHz
F
Variable CPU Clock
–
–
–
–
0
–
–
–
> 0)
A
F
F
F
F
)
A
A
F
C
A
C
C
A
2TCL - 20 + t
3TCL - 20 + t
+ t
+ t
Maximum
3TCL - 20
4TCL - 30
2TCL - 14
3TCL - 20
+ 2t
+ t
TCL - 10
+ t
10 - t
ST10F269-T3
F
F
C
A
A
+ 2t
+ 2t
–
–
–
–
–
–
–
–
–
–
–
–
+ 2t
+ t
+ t
A
C
A
A
C
A
1
1
C
C
147/162
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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