AM29F010-120JC Spansion Inc., AM29F010-120JC Datasheet - Page 26
![no-image](/images/manufacturer_photos/0/6/621/spansion_inc__sml.jpg)
AM29F010-120JC
Manufacturer Part Number
AM29F010-120JC
Description
Manufacturer
Spansion Inc.
Datasheet
1.AM29F010-120JC.pdf
(31 pages)
Specifications of AM29F010-120JC
Cell Type
NOR
Density
1Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
17b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
PLCC
Program/erase Volt (typ)
4.5 to 5.5V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
128K
Supply Current
30mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29F010-120JC
Manufacturer:
AMD
Quantity:
20 000
AC CHARACTERISTICS
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25 C, 5.0 V V
2. Under worst case conditions of 90°C, V
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 1
6. The device has a typical erase and program cycle endurance of 1,000,000 cycles. 100,000 cycles are guaranteed.
26
Notes:
1. PA = Program Address, PD = Program Data, SA = Sector Address, DQ7# = Complement of Data Input, D
2. Figure indicates the last two bus cycles of the command sequence.
Chip/Sector Erase Time
Byte Programming Time
Chip Programming Time (Note 3)
programming typicals assume checkerboard pattern.
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then
does the device set DQ5 = 1. See the section on DQ5 for further information.
for further information on command definitions.
Addresses
Parameter
WE#
Data
OE#
CE#
Figure 13. Alternate CE# Controlled Write Operation Timings
5555 for program
2AAA for erase
t
t
t
WS
WH
WC
Typ (Note 1)
A0 for program
55 for erase
CC
t
GHEL
t
t
t
DS
CP
PA for program
SA for sector erase
5555 for chip erase
CPH
= 4.5 V (4.75 V for -45, -55 PDIP), 100,000 cycles.
t
1.0
1.8
14
AS
t
DH
t
AH
Am29F010
PD for program
30 for sector erase
10 for chip erase
Limits
Max (Note 2)
1000
t
12.5
WHWH1 or 2
15
Data# Polling
Unit
sec
sec
CC
s
, 100,000 cycles. Additionally,
DQ7#
PA
Excludes 00h programming prior to
erasure (Note 4)
Excludes system-level overhead
(Note 5)
D
OUT
Comments
OUT
= Array Data.
16736G-17