W29C020P-12 Winbond Electronics, W29C020P-12 Datasheet - Page 4

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W29C020P-12

Manufacturer Part Number
W29C020P-12
Description
Manufacturer
Winbond Electronics
Datasheet

Specifications of W29C020P-12

Density
2Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Bottom/Top
Address Bus
18b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
PLCC
Program/erase Volt (typ)
5V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
256K
Supply Current
50mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Hardware Data Protection
The integrity of the data stored in the W29C020 is also hardware protected in the following ways:
(1) Noise/Glitch Protection: A WE pulse of less than 15 nS in duration will not initiate a write cycle.
(2) V
(3) Write Inhibit Mode: Forcing OE low, CE high, or WE high will inhibit the write operation. This
(4) V
Chip Erase Modes
The entire device can be erased by using a six-byte software command code. See the Software Chip
Erase Timing Diagram.
Boot Block Operation
There are two boot blocks (8K bytes each) in this device, which can be used to store boot code. One
of them is located in the first 8K bytes and the other is located in the last 8K bytes of the memory.
The first 8K or last 8K of the memory can be set as a boot block by using a seven-byte command
sequence.
See Command Codes for Boot Block Lockout Enable for the specific code. Once this feature is set
the data for the designated block cannot be erased or programmed (programming lockout); other
memory locations can be changed by the regular programming method. Once the boot block
programming lockout feature is activated, the chip erase function will be disabled. In order to detect
whether the boot block feature is set on the two 8K blocks, users can perform a six-byte command
sequence: enter the product identification mode (see Command Codes for Identification/Boot Block
Lockout Detection for specific code), and then read from address "00002 hex" (for the first 8K bytes)
or "3FFF2 hex" (for the last 8K bytes). If the output data is "FF hex," the boot block programming
lockout feature is activated; if the output data is "FE hex," the lockout feature is deactivated and the
block can be programmed.
To return to normal operation, perform a three-byte command sequence to exit the identification
mode. For the specific code, see Command Codes for Identification/Boot Block Lockout Detection.
Data Polling (DQ7)- Write Status Detection
The W29C020 includes a data polling feature to indicate the end of a write cycle. When the
W29C020 is in the internal write cycle, any attempt to read DQ7 from the last byte loaded during the
page/byte-load cycle will receive the complement of the true data. Once the write cycle is completed.
DQ7 will show the true data. See the DATA Polling Timing Diagram.
prevents inadvertent writes during power-up or power-down periods.
5 mS before any write (erase/program) operation.
DD
DD
Power Up/Down Detection: The write operation is inhibited when V
power-on delay: When V
DD
reaches its sense level, the device will automatically timeout for
- 4 -
DD
is less than 2.5V.
W29C020

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