DT28F800F3B95 Intel, DT28F800F3B95 Datasheet - Page 7
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DT28F800F3B95
Manufacturer Part Number
DT28F800F3B95
Description
Manufacturer
Intel
Datasheet
1.DT28F800F3B95.pdf
(48 pages)
Specifications of DT28F800F3B95
Density
8Mb
Access Time (max)
95ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
19b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
SSOP
Sync/async
Async/Sync
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
512K
Supply Current
60mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DT28F800F3B95
Manufacturer:
INTEL
Quantity:
5
1.0
1.1
PRELIMINARY
Introduction
This datasheet contains 8-Mbit 3 Volt Intel
1.0 provides a flash memory overview. Sections 2.0 through 8.0 describe the memory functionality
and electrical specifications for automotive temperature product offerings.
Product Overview
The 3 Volt Fast Boot Block Flash memory provides density upgrades with pinout compatibility for
8-Mbit densities. This family of products is a high-performance, low-voltage memory with a 16-bit
data bus and individually erasable blocks. These blocks are optimally sized for code and data
storage. Eight 4-Kword parameter blocks are positioned at either the top (denoted by -T suffix) or
bottom (denoted by -B suffix) of the address map. The rest of the device is grouped into 32-Kword
main blocks. The upper two (or lower two) parameter blocks, and all main blocks, can be locked
when WP# = V
The device’s optimized architecture and interface dramatically increase read performance. It
supports synchronous burst reads and asynchronous page mode reads from main blocks (parameter
blocks support single synchronous and asynchronous reads). Upon initial power-up or return from
reset, the main blocks of the device default to a page-mode. Page-mode is for non-clocked memory
systems and is compatible with page-mode ROM. Synchronous burst reads are enabled by
configuring the Read Configuration Register using the standard two-bus-cycle algorithm. In
synchronous burst mode, the CLK input increments an internal burst address generator,
synchronizes the flash memory with the host CPU, and outputs data on every rising (or falling)
CLK edge up to 50 MHz. An output signal, WAIT#, is also provided to ease CPU-to-flash memory
communication and synchronization during continuous burst operations that are not initiated on a
four-word boundary.
In addition to the enhanced architecture and optimized interface, this family of products
incorporates SmartVoltage technology which enables fast 12 Volt factory programming and 3.0 V–
3.6 V in system programming for low power designs. Specifically designed for low-voltage
systems, 3 Volt Fast Boot Block Flash memory components support read, write and erase
operations at 3.0 V–3.6 V. The 12 V V
increase factory programming throughput. With the 3.0 V–3.6 V V
tied together for a simple, low power design. In addition to the voltage flexibility, the dedicated
V
The flexible input/output (I/O) voltage feature of the device helps reduce system power
consumption and simplifies interfacing to sub 3.0 V CPUs. Powered by the V
buffers can operate independently of the core voltage. The Flexible I/O ring of the device works in
the following mode:
The device’s Command User Interface (CUI) serves as the interface between the system processor
and internal flash memory operation. A valid command sequence written to the CUI initiates
device automation. This automation is controlled by an internal Write State Machine (WSM) which
automatically executes the algorithms and timings necessary for block erase and program
operations. The status register provides WSM feedback by signifying block erase or program
completion and status.
PP
With V
power, and battery-powered applications.
pin gives complete data protection when V
CC
and V
IL
for complete code protection.
CCQ
at 3.0 V–3.6 V the device is an ideal fit for single supply voltage, low
PP
option renders the fastest program performance to
®
Fast Boot Block Flash memory information. Section
PP
V
PPLK
.
PP
option, V
28F800F3—Automotive
CCQ
CC
pins, the I/O
and V
PP
can be
1