M29W200BB55N6T Micron Technology Inc, M29W200BB55N6T Datasheet - Page 11

• Manufacturer Part Number: M29W200BB55N6T
• Manufacturer: Micron Technology Inc

Specifications of M29W200BB55N6T

• Cell Type: NOR
• Density: 2Mb
• Access Time (max): 55ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 18/17Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 3 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 256K/128K
• Supply Current: 10mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

Figure 4. Data Polling Flowchart
Erase Timer Bit (DQ3). The Erase Timer Bit can
be used to identify the start of Program/Erase
Controller operation during a Block Erase com-
mand. Once the Program/Erase Controller starts
erasing the Erase Timer Bit is set to ’1’. Before the
Program/Erase Controller starts the Erase Timer
Bit is set to ’0’ and additional blocks to be erased
may be written to the Command Interface. The
Erase Timer Bit is output on DQ3 when the Status
Register is read.
Alternative Toggle Bit (DQ2). The
Toggle Bit can be used to monitor the Program/
Erase controller during Erase operations. The Al-
ternative Toggle Bit is output on DQ2 when the
Status Register is read.
During Chip Erase and Block Erase operations the
Toggle Bit changes from ’0’ to ’1’ to ’0’, etc., with
successive Bus Read operations from addresses
at VALID ADDRESS
at VALID ADDRESS
NO
READ DQ5 & DQ7
READ DQ7
START
DATA
DATA
FAIL
DQ7
DQ5
DQ7
= 1
=
=
YES
NO
NO
YES
YES
PASS
Alternative
AI03598
Figure 5. Data Toggle Flowchart
within the blocks being erased. Once the operation
completes the memory returns to Read mode.
During Erase Suspend the Alternative Toggle Bit
changes from ’0’ to ’1’ to ’0’, etc. with successive
Bus Read operations from addresses within the
blocks being erased. Bus Read operations to ad-
dresses within blocks not being erased will output
the memory cell data as if in Read mode.
After an Erase operation that causes the Error Bit
to be set the Alternative Toggle Bit can be used to
identify which block or blocks have caused the er-
ror. The Alternative Toggle Bit changes from ’0’ to
’1’ to ’0’, etc. with successive Bus Read Opera-
tions from addresses within blocks that have not
erased correctly. The Alternative Toggle Bit does
not change if the addressed block has erased cor-
rectly.
NO
M29W200BT, M29W200BB
DQ5 & DQ6
READ DQ6
READ DQ6
TOGGLE
TOGGLE
START
TWICE
READ
DQ6
DQ5
DQ6
FAIL
= 1
=
=
YES
YES
YES
NO
NO
PASS
AI01370B
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