LH28F400SUHT-LC15 Sharp Electronics, LH28F400SUHT-LC15 Datasheet
LH28F400SUHT-LC15
Specifications of LH28F400SUHT-LC15
Related parts for LH28F400SUHT-LC15
LH28F400SUHT-LC15 Summary of contents
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... State-of-the-Art 0.55 µm ETOX™ Flash Technology • 56-Pin, 1.2 mm × × TSOP (Type I) Package • 48-Pin 1.2 mm × × TSOP (Type I) Package • 44-Pin 600-mil SOP Package 4M (512K × 8, 256K × 16) Flash Memory 56-PIN TSOP ...
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... LH28F400SU-LC 48-PIN TSOP RY/ Figure 2. 48-PIn TSOP Configuration 2 4M (512K × 8, 256K × 16) Flash Memory TOP VIEW 44-PIN SOP RP/BY BYTE 47 46 GND GND GND Figure 3. 44-Pin SOP Configuration 0 28F400SUH-LC15-23 TOP VIEW BYTE 32 GND 28F400SUH-LC15-22 ...
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... Flash Memory OUTPUT BUFFER OUTPUT MULTIPLEXER INPUT -1,0 17 BUFFER Y-DECODER ADDRESS X-DECODER QUEUE LATCHES ADDRESS COUNTER Figure 4. LH28F004SU-LC Block Diagram OUTPUT INPUT BUFFER BUFFER DATA ID QUEUE REGISTER REGISTERS CSR REGISTER ESRs DATA COMPARATOR Y GATING/SENSING . . . . . . LH28F400SU-LC INPUT BUFFER ...
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... Deep Power-Down state. All » is high and float. Address then becomes the lowest order address (512K × 8, 256K × 16) Flash Memory » goes low, any current or » » pin is floated. selects between the high 1 1 input ...
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... Flash Memory INTRODUCTION Sharp’s LH28F400SU-LC 4M Flash Memory is a revolutionary architecture which enables the design of truly mobile, high performance, personal computing and communication products. With innovative capabilities, 3.3 V low power operation and very high read/write per- formance, the LH28F400SU-LC is also the ideal choice for designing embedded mass storage flash memory systems ...
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... Flash Memory 16KB BLOCK 31 16KB BLOCK 30 16KB BLOCK 29 16KB BLOCK 28 16KB BLOCK 27 16KB BLOCK 26 16KB BLOCK 25 16KB BLOCK 24 ...
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... Flash Memory BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS Bus Operations for Word-Wide Mode (BY » » MODE RP CE Read Output Disable Standby Deep Power-Down Manufacturer Device Write Bus Operations for Word-Wide Mode (BY MODE RP » CE » Read Output Disable ...
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... A 1 WDL looks at the WDH. In word-wide (x16) mode Second bus cycle address of Protect Set/Confirm and Protect Reset/Confirm command is 0FFH. Specifically A others are don’t care (512K × 8, 256K × 16) Flash Memory FIRST BUS CYCLE OPER. ADDRESS DATA Write X FFH ...
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... Flash Memory Compatible Status Register WSMS ESS CSR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy CSR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase in Progress/Completed CSR.5 = ERASE STATUS (ES Error in Block Erasure 0 = Successful Block Erase CSR.4 = DATA-WRITE STATUS (DWS Error in Data Write 0 = Data Write Successful CSR ...
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... DATA WRITE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD RETRY/ERROR RECOVERY Figure 6. Word/Byte Writes with Compatible Status Register 10 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Write Word/Byte D = 40H or 10H Write Write Read Q = CSRD Toggle update CSRD Standby Check CSR ...
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... Flash Memory START WRITE 20H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER NO 0 SUSPEND CSR.7 = ERASE 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 ERASE CSR. SUCCESSFUL ...
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... READ ARRAY DATA DONE NO READING YES WRITE D0H WRITE FFH ERASE RESUMED READ ARRAY DATA Figure 8. Erase Suspend to Read Array with Compatible Status Register 12 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Write Erase D = B0H Suspend Read Q = CSRD Toggle update CSRD ...
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... Flash Memory START READ COMPATIBLE STATUS REGISTER 0 CSR RESET WP READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 77H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. LOCK YES ANOTHER BLOCK NO SET WP OPERATION COMPLETE BUS COMMAND ...
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... Use Set-Write-Protect flowchart. This step re-implements protection to locked blocks. 4. Use Word/Byte-Write or 2-Byte-Write flowchart sequences to write data. 5. Use Block-Lock flowchart to write lock bit if desired. Figure 10. Updating Data in a Locked Block 14 4M (512K × 8, 256K × 16) Flash Memory START RESET WP (NOTE 1) WRITE MORE ...
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... Flash Memory START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE FBH WRITE DATA/A 10 WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. ANOTHER YES 2-BYTE WRITE NO OPERATION COMPLETE Figure 11. Two-Byte SerialWrites with Compatible Status Registers (40-pin TSOP) (Apply to LH28F004SU, x8, 40TSOP) ...
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... CSR. ANOTHER YES 2-BYTE WRITE NO OPERATION COMPLETE Figure 12. Two-Byte Serial Writes with Compatible Status Registers (56-pin TSOP, 44-pin SOP (512K × 8, 256K × 16) Flash Memory BUS COMMAND COMMENTS OPERATION Read Q = CSRD Toggle update CSRD WSM Ready 0 = WSM Busy Write 2-Byte ...
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... Flash Memory START WRITE A7H WRITE D0H READ COMPATIBLE STATUS REGISTER NO 0 SUSPEND CSR.7 = ERASE 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 ERASE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT ...
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... WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE 18 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Read Write Set Write Protect Set Confirm Write Read Read NOTE: If CSR. set command sequence error, should be cleared before further attempts are initiated. ...
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... Flash Memory START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 47H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE BUS COMMAND OPERATION Read Write Reset Write Protect Write Reset Confirm Read Read NOTE: If CSR. set command sequence error, should be cleared before further attempts are initiated ...
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... Timing Specifications Equivalent Testing Load Circuit V NOTE: 1. Sampled, not 100% tested (512K × 8, 256K × 16) Flash Memory * WARNING: Stressing the device beyond the “Abso- lute Maximum Ratings” may cause permanent dam- age. These are stress ratings only. Operation beyond the “Operating Conditions” is not recommended and extended exposure beyond the “ ...
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... Flash Memory Timing Nomenclature For 3.3 V systems use 1.5 V cross point definitions. Each timing parameter consists of 5 characters. Some common examples are defined below time (t) from CE » (E) going low (L) to the outputs (Q) becoming valid (V) CE ...
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... Write Current CCW Block Erase Current CCE CC V Erase Suspend CC I CCES Current I V Standby Current PPS PP V Deep Power-Down PP I PPD Current 22 4M (512K × 8, 256K × 16) Flash Memory TYP. MIN. MAX. UNITS ±1 µ ±10 µ µA CE BYTE = 0 BYTE = V ...
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... Flash Memory DC Characteristics (Continued 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER I V Read Current PPR Write Current PPW Erase Current PPE PP V Erase Suspend PP I PPES Current V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage ...
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... OE » may be delayed ELQV GLQV 3. Sampled, not 100% tested MIN. MAX. UNITS 150 150 ns 150 ns 750 » » Low 20 ns after the falling edge of CE » without impact (512K × 8, 256K × 16) Flash Memory NOTE ELQV ...
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... Flash Memory AC Characteristics - Read Only Operations V = 2.85 V ± 0. 0°C to +70° SYMBOL PARAMETER t Read Cycle Time AVAV » t Address Setup to OE Going Low AVGL t Address to Output Delay AVQV t CE » to Output Delay ELQV » High to Output Delay PHQV » ...
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... STANDBY V IH ADDRESSES ( ( ( ( HIGH-Z OH DATA (D/ 5 GND ( (512K × 8, 256K × 16) Flash Memory DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV t AVGL t GLQV t ELQV t GLQX t ELQX t AVQV t PHQV Figure 18. Read Timing Waveforms V CC DATA VALID STANDBY . . . POWER-DOWN . . . . . . t EHQZ . . . t GHQZ . . . ...
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... Flash Memory V IH ADDRESSES ( ( ( BYTE ( HIGH-Z OH DATA ( HIGH-Z OH DATA ( ADDRESSES STABLE t AVAV t FLEL t AVGL t AVQV t GLQV t ELQV t GLQX t ELQX DATA OUTPUT t AVQV t FLQZ DATA OUTPUT Figure 19. BY » » Timing Waveforms LH28F400SU- EHQZ ...
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... The power supply may start to switch concurrently with RP » 2. The address access time and RP high to data valid time are shown for 3 Characteristics Read Only Operations also (512K × 8, 256K × 16) Flash Memory 3 PL3V » Power-Up and RP Reset Waveforms CC MIN ...
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... Flash Memory AC Characteristics for WE » - Controlled Command Write Operations V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER t Write Cycle Time AVAV t V Set Going High VPWH » Setup to CE » Going Low PHEL » Setup to WE Going Low ...
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... ADDRESS AND DATA AUTOMATED (DATA-WRITE) OR DATA-WRITE ERASE CONFIRM OR ERASE COMMAND DELAY AVWH t WHAX (NOTE AVWH WHAX t t WHWL WHQV WHDX t DVWH WHRL t VPWH 4M (512K × 8, 256K × 16) Flash Memory READ COMPATIBLE STATUS REGISTER DATA t WHGL t GHWL OUT IN t RHPL (NOTE 4) t QVVL 28F004SU-Z9-19 ...
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... Flash Memory AC Characteristics for CE » - Controlled Command Write Operations V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER t Write Cycle Time AVAV t RP » Setup to WE Going Low PHWL » Set Going High VPEH PP » Setup to CE ...
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... ADDRESS AND DATA AUTOMATED (DATA-WRITE) OR DATA-WRITE ERASE CONFIRM OR ERASE COMMAND DELAY AVEH t EHAX (NOTE AVEH EHAX t t EHEL EHQV EHDX t DVEH EHRL t VPEH 4M (512K × 8, 256K × 16) Flash Memory READ COMPATIBLE STATUS REGISTER DATA t EHGL t GHEL OUT IN t RHPL (NOTE 4) t QVVL 28F400SUH-LC15-20 ...
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... Flash Memory Erase and Word/Byte Write Performance V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER 1 t Byte Write Time WHRH 2 Two-Byte Serial Write Time t WHRH 3 t Word Write Time WHRH 4 t 16KB Block Write Time WHRH 5 t 16KB Block Write Time ...
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... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 34 4M (512K × 8, 256K × 16) Flash Memory 56 0.50 [0.020] TYP. 0.28 [0.011] 0.12 [0.005] 29 0.13 [0.005] 0.49 [0.019] 0.39 [0.015] ...
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... Flash Memory 48TSOP (TSOP048-P-1218) 0.50 [0.020] 0.30 [0.012] TYP. 0.10 [0.004 12.20 [0.480] 11.80 [0.465] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 25 16.60 [0.654] 18.40 [0.724] 16.20 [0.638] 17.60 [0.693] 24 0.15 [0.006] 1.10 [0.043] 0.425 [0.017] 0.90 [0.035] 1 ...
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... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F400SU H X -LC15 Device Type Package Speed Example: LH28F400SUHT-LC15 (4M (512K x 8) Flash Memory, 150 ns, 56-pin TSOP (512K × 8, 256K × 16) Flash Memory 23 13.40 [0.528] 16.40 [0.646] 13.00 [0.512] 15.60 [0.614] SEE 22 DETAIL ...
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... Camas, WA 98607, U.S.A. Phone: (360) 834-2500 Telex: 49608472 (SHARPCAM) Facsimile: (360) 834-8903 http://www.sharpmeg.com ©1997 by SHARP Corporation Issued July 1995 EUROPE SHARP Electronics (Europe) GmbH Microelectronics Division Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Telex: 2161867 (HEEG D) Facsimile: (49) 40 2376-2232 LH28F400SU-LC ...