LH28F800SGE-L70 Sharp Electronics, LH28F800SGE-L70 Datasheet - Page 38
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LH28F800SGE-L70
Manufacturer Part Number
LH28F800SGE-L70
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F800SGE-L70.pdf
(45 pages)
Specifications of LH28F800SGE-L70
Cell Type
NOR
Density
8Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
19b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7/3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Word Size
16b
Number Of Words
512K
Supply Current
65mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH28F800SGE-L70
Manufacturer:
SHARP
Quantity:
208
Part Number:
LH28F800SGE-L70
Manufacturer:
SHAEP
Quantity:
20 000
6.2.6 AC CHARACTERISTICS FOR CE#-CONTROLLED WRITE OPERATIONS (contd.)
NOTES :
1. In systems where CE# defines the write pulse width
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid A
4. V
SYMBOL
• V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
PHHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
CC
(within a longer WE# timing waveform), all setup, hold,
and inactive WE# times should be measured relative to
the CE# waveform.
word write, or lock-bit configuration.
should be held at V
word write, or lock-bit configuration success (SR.1/3/4/5 = 0).
PP
= 5.0±0.25 V, 5.0±0.5 V, T
should be held at V
Write Cycle Time
RP# High Recovery to CE#
Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RY/BY# High
RP# V
RY/BY# High
PP
PP
VERSIONS
Setup to CE# Going High
Hold from Valid SRD,
HH
HH
Setup to CE# Going High
PARAMETER
Hold from Valid SRD,
HH
) until determination of block erase,
PPH1/2/3
IN
and D
A
(and if necessary RP#
= 0 to +70˚C or –40 to +85
IN
V
V
CC
for block erase,
CC
±0.25 V
±0.5 V
NOTE
2, 4
2, 4
2
2
2
3
3
LH28F800SGH-L70
LH28F800SG-L70
(NOTE 5)
MIN.
100
100
- 38 -
70
50
40
40
25
1
0
5
5
0
0
0
0
5. See Fig. 10 "Transient Input/Output Reference
6. See Fig. 11 "Transient Input/Output Reference
MAX.
˚
C
90
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
Waveform" and Fig. 12 "Transient Equivalent Testing
Load Circuit" (High Speed Configuration) for testing
characteristics.
Waveform" and Fig. 12 "Transient Equivalent Testing
Load Circuit" (Standard Configuration) for testing
characteristics.
LH28F800SGH-L70
LH28F800SG-L70
(NOTE 6)
MIN.
100
100
80
50
40
40
25
1
0
5
5
0
0
0
0
MAX.
90
LH28F800SGH-L10
LH28F800SG-L10
(NOTE 6)
MIN.
100
100
100
50
40
40
25
1
0
5
5
0
0
0
0
MAX.
90
(NOTE 1)
UNIT
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns