LH28F800BGE-TL85 Sharp Electronics, LH28F800BGE-TL85 Datasheet - Page 36
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LH28F800BGE-TL85
Manufacturer Part Number
LH28F800BGE-TL85
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F800BGE-TL85.pdf
(43 pages)
Specifications of LH28F800BGE-TL85
Cell Type
NOR
Density
8Mb
Interface Type
Parallel
Boot Type
Top
Address Bus
19b
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7/3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7/4.5V
Operating Supply Voltage (max)
3.6/5.5V
Word Size
16b
Number Of Words
512K
Supply Current
65mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
6.2.6 ALTERNATIVE CE#-CONTROLLED WRITES (contd.)
NOTES :
1. In systems where CE# defines the write pulse width
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid A
4. V
SYMBOL
• V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
PHHEH
SHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
QVSL
CC
(within a longer WE# timing waveform), all setup, hold,
and inactive WE# times should be measured relative to
the CE# waveform.
word write.
should be held at V
or word write success (SR.1/3/4/5 = 0 : on Boot Blocks,
SR.3/4/5 = 0 : on Parameter Blocks and Main Blocks).
PP
= 5.0±0.25 V, 5.0±0.5 V, T
should be held at V
Write Cycle Time
RP# High Recovery to CE#
Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
WP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RY/BY# High
RP# V
RY/BY# High
WP# V
RY/BY# High
PP
PP
VERSIONS
Setup to CE# Going High
Hold from Valid SRD,
HH
IH
HH
IH
Setup to CE# Going High
Setup to CE# Going High
PARAMETER
Hold from Valid SRD,
Hold from Valid SRD,
HH
) until determination of block erase
PPH1/2/3
IN
and D
A
(and if necessary RP#
= 0 to +70˚C or –40 to +85
IN
for block erase or
V
V
CC
CC
±0.25 V
±0.5 V
NOTE
2, 4
2, 4
2, 4
2
2
2
2
3
3
LH28F800BGH-L85
LH28F800BG-L85
(NOTE 5)
MIN.
100
100
100
- 36 -
85
50
40
40
25
1
0
5
5
0
0
0
0
0
5. See Fig. 8 "Transient Input/Output Reference
6. See Fig. 9 "Transient Input/Output Reference
MAX.
˚
C
90
LH28F800BG-L/BGH-L (FOR TSOP, CSP)
Waveform" and Fig. 10 "Transient Equivalent Testing
Load Circuit" (High Seed Configuration) for testing
characteristics.
Waveform" and Fig. 10 "Transient Equivalent Testing
Load Circuit" (Standard Configuration) for testing
characteristics.
LH28F800BGH-L85
LH28F800BG-L85
(NOTE 6)
(NOTE 1)
MIN.
100
100
100
90
50
40
40
25
1
0
5
5
0
0
0
0
0
MAX.
90
LH28F800BGH-L12
LH28F800BG-L12
(NOTE 6)
MIN.
120
100
100
100
50
40
40
25
1
0
5
5
0
0
0
0
0
MAX.
90
UNIT
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns