LH28F160BVHE-TTL10 Sharp Electronics, LH28F160BVHE-TTL10 Datasheet - Page 6

• Manufacturer Part Number: LH28F160BVHE-TTL10
• Manufacturer: Sharp Electronics

Specifications of LH28F160BVHE-TTL10

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 100ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

1 INTRODUCTION
This datasheet contains LH28F160BVHE-TTL10
specifications. Section 1 provides a flash memory
overview. Sections 2, 3, 4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
1.1 Features
Key enhancements of LH28F160BVHE-TTL10 Flash
memory are:
Please note following contents:
1.2 Product Overview
The LH28F160BVHE-TTL10 is a high-performance 16-
Mbit Flash memory organized as 2M-byte of 8 bits or
1M-word of 16 bits. The 2M-byte/1M-word of data is
arranged in two 8K-byte/4K-word boot blocks, six 8K-
byte/4K-word parameter blocks and thirty-one 64K-
byte/32K-word main blocks which are individually
erasable in-system. The memory map is shown in Figure
3.
A choice of V
Table 1, to meet system performance and power
expectations. V
separate 12V converter, while V
erase and word/byte write performance. In addition to
flexible erase and program voltages, the dedicated V
gives complete data protection when V
sharp
•2.7V-3.6V V
•Enhanced Suspend Capabilities
•Boot Block Architecture
•V
block erase and word/byte write operations. The V
voltage transitions to GND is recommended for
designs that switch V
PPLK
has been lowered to 1.5V to support 2.7V-3.6V
PP
CC
CC
at 2.7V-3.6V eliminates the need for a
and V
and V
PP
PP
PP
off during read operation.
Read/Write/Erase Operations
combinations, as shown in
PP
=12V maximizes block
PP
≤ V
PPLK
.
PP
pin
LHF16V04
PP
Internal V
configures the device for optimized read and write
operations.
A Command User Interface (CUI) serves as the interface
between the system processor and internal operation of the
device. A valid command sequence written to the CUI
initiates device automation. An internal Write State
Machine (WSM) automatically executes the algorithms
and timings necessary for block erase and word/byte write
operations.
A block erase operation erases one of the device’s 32K-
word blocks typically within 1.2s (3.0V V
4K-word blocks typically within 0.5s (3.0V V
V
independently erased 100,000 times. Block erase suspend
mode allows system software to suspend block erase to
read or write data from any other block.
Writing memory data is performed in
increments of the device’s 32K-word blocks typically
within 55µs (3.0V V
typically within 60µs (3.0V V
write suspend mode enables the system to read data or
execute code from any other flash memory array location.
PP
) independent of other blocks. Each block can be
V
2.7V-3.6V
CC
Table 1. V
Voltage
CC
and V
CC
and V
PP
CC
detection Circuitry automatically
, 3.0V V
PP
2.7V-3.6V, 11.4V-12.6V
Voltage Combinations
CC
V
, 3.0V V
PP
PP
Voltage
), 4K-word blocks
PP
CC
). Word/byte
, 3.0V V
word/byte
CC
Rev. 1.1
, 3.0V
PP
3
),