LH28F160BJHE-BTL70 Sharp Electronics, LH28F160BJHE-BTL70 Datasheet - Page 14

• Manufacturer Part Number: LH28F160BJHE-BTL70
• Manufacturer: Sharp Electronics

Specifications of LH28F160BJHE-BTL70

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

NOTE:
3. A-1 don’t care in byte mode.
2. DQ,,-DQ,
1. BA selects the specific block lock configuration code
Read Array command functions independently of the
4.2 Read Identifier Codes Command
The identifier code operation is initiated by writing the
Read Identifier Codes command. Following the command
write, read cycles from addresses shown in Figure 4
retrieve the manufacturer, device, block lock configuration
and permanent lock configuration codes (see Table 4 for
identifier code values). To terminate the operation, write
another valid command. Like the Read Array command,
the
independently of the Vccw
Following
following information can be read:
Upon initial device power-up and after exit from reset
mode, the device defaults to read array mode. This
operation is also initiated by writing
command. The device remains enabled for reads until
another command is written, Once the internal WSM has
started a block erase, full chip erase, word/byte write or
lock-bit configuration the device will not recognize the
Read Array command until the WSM
operation unless the WSM is suspended via an Erase
Suspend or Word/Byte
V,,-w voltage and RP# can be V,,.
4.1 Read Array Command
Manufacture Code
Device Code
Block Lock Configuration
*Block is Unlocked
*Block is Locked
*Reserved for Future Use
*Device is Unlocked
*Device is Locked
*Reserved for Future Use
SHARP
to be read. See Figure 4 for the device identifier code
memory map.
Read
the Read Identifier
Code
outputs OOH in word mode.
Identifier
Table 4. Identifier Codes
Write Suspend command. The
Codes
voltage and RP# can be V,,.
Address(*)
Codes command, the
[A,9-Aol
BA(‘)+2
OOOOOH
OOOOlH
command
the Read Array
completes its
~
:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:.:..
PQ7-DQol
DQ,=l
DQ,=O
DQ,=l
DQ,=O
Data(31
DQ1-7
DO, -,
functions
BOH
E9H
LHFl6507
reset these bits, several operations (such as cumulatively
erasing multiple blocks or writing several words/bytes in
polled to determine if an error occurred during the
sequence.
To clear the status register, the Clear Status Register
command (50H) is written. It functions independently of
the applied Vccw
command is not functional
word/byte write suspend modes.
4.4 Clear Status Register Command
Status register bits SR.5, SR.4, SR.3 or SR.1 are set to
Register command. These bits indicate various failure
conditions (see Table 6). By allowing system software to
sequence) may be performed. The status register may be
writing the Read Status Register command. After writing
from the status register until another valid command is
written. The status register contents are latched on the
falling edge of OE# or CE#, whichever occurs. OE# or
CE# must toggle to V,, before further reads to update the
status register latch. The Read Status Register command
functions independently of the V,-w
VU-I.
“1”s by the WSM and can only be reset by the Clear Status
4.3 Read Status Register Command
The status register may be read to determine when a bloc)
erase, full chip erase, word/byte
configuration
completed successfully.
this command, all subsequent read operations output dan
is complete and whether
Voltage. RP# can be V,,.
It may be read at any time b)
during block
voltage. RP# can be
write
the operatior
or lock-bi
erase or
Rev. 1.2
This
12
J
I