LH28F160S3HNS-L10A Sharp Electronics, LH28F160S3HNS-L10A Datasheet - Page 4

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LH28F160S3HNS-L10A

Manufacturer Part Number
LH28F160S3HNS-L10A
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F160S3HNS-L10A

Cell Type
NOR
Density
16Mb
Access Time (max)
100ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SSOP
Program/erase Volt (typ)
2.7/3.3/5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
SHARP’s LH28F160S3B-L10A Flash memory with Smart 3 technology is a high-density, low-cost, nonvolatile,
read/write storage solution for a wide range of applications. Its symmetrically-blocked architecture, flexible voltage
and extended cycling provide for highly flexible component suitable for resident flash arrays, SIMMs and memory
cards. Its enhanced suspend capabilities provide for an ideal solution for code + data storage applications. For
secure code storage applications, such as networking, where code is either directly executed out of flash or
downloaded to DRAM, the LH28F160S3B-L10A offers three levels of protection: absolute protection with V
GND, selective hardware block locking, or flexible software block locking. These alternatives give designers
ultimate control of their code security needs.
The LH28F160S3B-L10A is conformed to the flash Scalable Command Set (SCS) and the Common Flash Interface
(CFI) specification which enable universal and upgradable interface, enable the highest system/device data transfer
rates and minimize device and system-level implementation costs.
The LH28F160S3B-L10A is manufactured on SHARP’s 0.35µm ETOX
size package: the 64-Ball CSP ideal for board constrained applications.
*ETOX is a trademark of Intel Corporation.
Smart 3 Technology
Common Flash Interface (CFI)
Scalable Command Set (SCS)
High Speed Write Performance
High Speed Read Performance
Operating Temperature
Enhanced Automated Suspend Options
High-Density Symmetrically-Blocked
Architecture
SRAM-Compatible Write Interface
User-Configurable x8 or x16 Operation
2.7V or 3.3V V
2.7V, 3.3V or 5V V
Universal & Upgradable Interface
32 Bytes x 2 plane Page Buffer
2.7µs/Byte Write Transfer Rate
100ns(3.3V±0.3V), 120ns(2.7V-3.6V)
0°C to +70°C
Write Suspend to Read
Block Erase Suspend to Write
Block Erase Suspend to Read
Thirty-two 64K-byte Erasable Blocks
CC
PP
16M-BIT (2MBx8/1MBx16)
Smart 3 Flash MEMORY
LH28F160S3B-L10A
LHF16KAN
Enhanced Data Protection Features
Extended Cycling Capability
Low Power Management
Automated Write and Erase
Chip Size Packaging
ETOX
Technology
CMOS Process
(P-type silicon substrate)
Not designed or rated as radiation
hardened
Absolute Protection with V
Flexible Block Locking
Erase/Write Lockout during Power
Transitions
100,000 Block Erase Cycles
3.2 Million Block Erase Cycles/Chip
Deep Power-Down Mode
Automatic Power Savings Mode
Decreases I
Command User Interface
Status Register
64-Ball CSP
TM*
TM
* V process technology. It come in chip-
V Nonvolatile Flash
CC
in Static Mode
PP
=GND
Rev. 2.0
PP
at
2

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