5962-9759802QYA QP SEMICONDUCTOR, 5962-9759802QYA Datasheet - Page 5

• Manufacturer Part Number: 5962-9759802QYA
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-9759802QYA

• Lead Free Status / Rohs Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
procedures and characteristics specified in 4.7 herein.
4.7 herein) to the specified pattern or erased (see 4.6 herein). As a minimum, verification shall consist of performing a functional
test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute
a device failure, and shall be removed from the lot.
reprogrammability test shall be done only for initial characterization and after any design or process changes which may affect
the reprogrammability of the device. The methods and procedures may be vendor specific, but shall be under document control
and shall be made available upon request.
be done for initial characterization and after any design or process changes which may affect data retention. The methods and
procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military
temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of
the acquiring or preparing activity, along with the test data.
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
3.11.2 Programmability of CPLDs. When specified, devices shall be programmed to the specified pattern using the
3.11.3 Verification of erasure or programmed CPLDs. When specified, devices shall be verified as either programmed (see
3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitor. This
3.13 Data Retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
4.2.1 Additional criteria for device class M.
4.2.2 Additional criteria for device classes Q and V.
a.
b.
c.
d.
a.
DEFENSE SUPPLY CENTER COLUMBUS
Delete the sequence specified as initial (pre-burn-in) electrical parameters through interim (post-burn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
Prior to burn-in, the devices shall be programmed (see 4.7 herein) with a checkerboard pattern or equivalent
(manufacturers at their option may employ an equivalent pattern provided it is topologically true alternating bit pattern).
The pattern shall be read before and after burn-in. Devices having bits not in the proper state after burn-in shall
constitute a device failure and shall be removed from the lot. The manufacturer as an option may use built-in test
circuitry by testing the entire lot to verify programmability and AC performance without programming the user array.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control
(2) T
Interim and final electrical test parameters shall be as specified in table IIA herein.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43218-3990
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015.
A
= +125°C, minimum.
STANDARD
SIZE
A
REVISION LEVEL
B
SHEET
5962-97598
5