CY62126DV30LL-55ZI Cypress Semiconductor Corp, CY62126DV30LL-55ZI Datasheet

CY62126DV30LL-55ZI

Manufacturer Part Number
CY62126DV30LL-55ZI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62126DV30LL-55ZI

Density
1Mb
Access Time (max)
55ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
16b
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
10mA
Operating Supply Voltage (min)
2.2V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
64K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62126DV30LL-55ZI
Manufacturer:
CY
Quantity:
2 608
Part Number:
CY62126DV30LL-55ZIT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Note:
Cypress Semiconductor Corporation
Document #: 38-05230 Rev. *H
Features
Functional Description
The CY62126DV30 is a high-performance CMOS static RAM
organized as 64K words by 16 bits. This device features
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
• Very high speed
• Temperature Ranges
• Wide voltage range
• Pin compatible with CY62126BV
• Ultra-low active power
• Ultra-low standby power
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• Available in Pb-free and non Pb-free 48-ball VFBGA and
— 2.2V - 3.6V
— Typical active current: 0.85 mA @ f = 1 MHz
— Typical active current: 5 mA @ f = f
44-pin TSOP Type II packages
— 55 ns
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
Logic Block Diagram
A
A
A
A
A
A
A
A
A
A
A
10
3
1
0
9
8
7
6
5
4
2
[1]
Max
COLUMN DECODER
DATA IN DRIVERS
(55 ns speed)
198 Champion Court
RAM Array
64K x 16
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption by 90% when addresses are not
toggling. The device can be put into standby mode reducing
power consumption by more than 99% when deselected (CE
HIGH). The input/output pins (I/O
in a high-impedance state when: deselected (CE HIGH),
outputs are disabled (OE HIGH), both Byte High Enable and
Byte Low Enable are disabled (BHE, BLE HIGH) or during a
write operation (CE LOW and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of read and write modes.
1-Mbit (64K x 16) Static RAM
15
San Jose
). If Byte High Enable (BHE) is LOW, then data
8
through I/O
,
CA 95134-1709
0
I/O
I/O
to I/O
CY62126DV30 MoBL
0
8
–I/O
–I/O
BHE
WE
CE
OE
BLE
7
7
15
. If Byte High Enable (BHE) is
15
0
Revised July 18, 2006
) is written into the location
0
through A
through I/O
0
15
through I/O
).
15
8
408-943-2600
to I/O
) are placed
15
. See
®
7
), is
) in
®
0
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Related parts for CY62126DV30LL-55ZI

CY62126DV30LL-55ZI Summary of contents

Page 1

... A 0 Note: 1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05230 Rev. *H 1-Mbit (64K x 16) Static RAM advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL portable applications such as cellular telephones ...

Page 2

... Product Portfolio V Product Range Min. CY62126DV30L Automotive 2.2 CY62126DV30LL Industrial [3, 4] Pin Configurations 48-ball VFBGA Top View BLE I/O BHE I/O I I/O I DNU NC I I Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured ...

Page 3

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ..............................................................−0.3 to 3.9V DC Voltage ...

Page 4

Capacitance Parameter Description C Input Capacitance IN C Output Capacitance OUT [8] Thermal Resistance Parameter Description Θ Thermal Resistance (Junction to Ambient) Still Air, soldered 4.5 inch, JA Θ Thermal Resistance (Junction to Case) JC ...

Page 5

Switching Characteristics (Over the Operating Range) Parameter Read Cycle t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW to Data Valid ACE t OE LOW to Data Valid ...

Page 6

Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID [15, 16] Read Cycle No. 2 (OE Controlled) ADDRESS CE t ACE BHE/BLE LZOE LZOE t DBE t LZBE HIGH IMPEDANCE DATA ...

Page 7

Switching Waveforms (continued) [12, 13, 16, 17, 18] Write Cycle No. 1 (WE Controlled ADDRESS BHE/BLE OE DATA I/O NOTE 19 t HZOE [12, 13, 16, 17, 18] Write Cycle No. 2 (CE Controlled) ADDRESS CE ...

Page 8

Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS CE BHE/BLE DATAI/O NOTE 19 t HZWE Write Cycle No. 4 (BHE/BLE-controlled, OE LOW) ADDRESS CE BHE/BLE DATA I/O NOTE 19 Document ...

Page 9

... Ordering Information Speed Ordering Code (ns) 55 CY62126DV30LL-55BVI CY62126DV30LL-55BVXI CY62126DV30LL-55ZI CY62126DV30LL-55ZXI CY62126DV30L-55BVXE CY62126DV30L-55ZSXE Please contact your local Cypress sales representative for availability of these parts Document #: 38-05230 Rev. *H Inputs/Outputs High Z Deselect/Power-Down High Z Output Disabled Data Out (I/O –I/O ) Read 0 15 High Z (I/O –I/O ) ...

Page 10

Package Diagrams TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 38-05230 Rev. *H 48-ball VFBGA ( mm) (51-85150) ...

Page 11

... Document #: 38-05230 Rev. *H © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 12

... Added Automotive Specs for I and Page# 4 Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 45 ns and 70ns Speed bin from Product offering Removed 56-pin QFN package Updated Ordering Information Table CY62126DV30 MoBL ...

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