CY7C0852V-150BBC Cypress Semiconductor Corp, CY7C0852V-150BBC Datasheet - Page 22
CY7C0852V-150BBC
Manufacturer Part Number
CY7C0852V-150BBC
Description
Manufacturer
Cypress Semiconductor Corp
Specifications of CY7C0852V-150BBC
Density
4Mb
Access Time (max)
4ns
Operating Supply Voltage (typ)
3.3V
Package Type
BGA
Operating Temp Range
0C to 70C
Supply Current
450mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
172
Word Size
36b
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C0852V-150BBC
Manufacturer:
CY
Quantity:
19
Company:
Part Number:
CY7C0852V-150BBC
Manufacturer:
CY
Quantity:
25
Document #: 38-06059 Rev. *D
Switching Waveforms
Bank Select Read
Notes:
27. In this depth-expansion example, B1 represents Bank #1 and B2 is Bank #2; each bank consists of one Cypress CY7C085XV device from this data sheet.
28.
29. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
30. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
31.
32. CE
ADDRESS
ADDRESS
Read-to-Write-to-Read (OE = LOW)
DATA
DATA
ADDRESS
DATA
ADDRESS
completed (labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
DATA
ADS = CNTEN= B0 – B3 = OE = LOW; MRST = CNTRST = CNT/MSK = HIGH.
CE
OUT(B2)
0
OUT(B1)
0
CE
CE
CLK
R/W
= B0 – B3 = R/W = LOW; CE
OUT
= OE = B0 – B3 = LOW; CE
CE
CLK
(B1)
(B1)
(B2)
IN
(B2)
(B1)
t
t
t
SW
SC
SA
= ADDRESS
t
t
t
t
SA
SC
SA
SC
[27, 28]
A
n
A
A
0
t
0
(B2)
CH2
t
CH2
.
t
(continued)
CYC2
t
1
t
t
1
HW
HC
HA
= R/W = CNTRST = MRST = HIGH.
t
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be
t
t
t
t
CYC2
HC
HC
HA
HA
t
CL2
t
CL2
[26, 29, 30, 31, 32]
A
READ
n+1
A
A
t
CD2
1
1
t
CD2
t
SW
PRELIMINARY
t
Q
SC
n
Q
t
A
0
SC
n+2
t
A
CKHZ
NO OPERATION
A
2
2
t
t
DC
HC
t
HW
CY7C0851V/CY7C0852V/CY7C0853V
t
HC
t
CD2
t
SD
A
D
n+2
n+2
Q
t
A
HD
A
1
3
t
3
DC
t
t
CKLZ
CKHZ
WRITE
t
CD2
CY7C0831V/CY7C0832V
A
n+3
Q
A
A
4
2
4
t
t
t
CKHZ
CD2
CKLZ
READ
t
CKLZ
Q
3
A
n+4
Page 22 of 33
A
t
A
CD2
5
t
5
t
CKLZ
t
CKHZ
CD2
Q
n+3
Q
4