CY7C146-35JC Cypress Semiconductor Corp, CY7C146-35JC Datasheet
CY7C146-35JC
Specifications of CY7C146-35JC
Available stocks
Related parts for CY7C146-35JC
CY7C146-35JC Summary of contents
Page 1
... CC • Fully asynchronous operation • Automatic power-down • Master CY7C132/CY7C136 easily expands data bus width more bits using slave CY7C142/CY7C146 • BUSY output flag on CY7C132/CY7C136; BUSY input on CY7C142/CY7C146 • INT flag for port-to-port communication (52-pin PLCC/PQFP versions) • Available in 48-pin DIP (CY7C132/142), 52-pin PLCC and 52-pin TQFP (CY7C136/146) • ...
Page 2
... I I 1415 [3] 7C132-25 7C132-30 7C136-25 7C136-30 [3] 7C136-15 7C142-25 7C142-30 7C146-15 7C146-25 7C146- 190 170 170 CY7C132/CY7C136 CY7C142/CY7C146 PQFP Top View 7C136 7C146 I 7C132-35 7C132-45 7C132-55 7C136-35 7C136-45 7C136-55 7C142-35 7C142-45 7C142-55 7C146-35 7C146-45 7C146-55 Unit 120 120 110 mA 170 ...
Page 3
... Mil [8] Test Conditions T = 25° MHz 5.0V CC and using AC Test Waveforms input levels of GND to 3V. rc CY7C132/CY7C136 CY7C142/CY7C146 Ambient Temperature V CC 0°C to +70°C 5V ± 10% –40°C to +85–C 5V ± 10% –55°C to +125°C 5V ± 10% [3] 7C132-30 7C132-35,45 7C132-55 7C136-25,30 7C136-35,45 ...
Page 4
... HZCE LZCE HZOE = 5pF Test Loads. Transition is measured ±500 mV from steady-state voltage. L CY7C132/CY7C136 CY7C142/CY7C146 5V 281Ω BUSY OR INT 30 pF BUSY Output Load (CY7C132/CY7C136 Only) 90% 10% < [5, 10] [3] 7C132-30 7C136-25 7C136-30 7C142-25 7C142-30 7C146-25 7C146-30 Max. Min. Max. ...
Page 5
... These parameters are measured from the input signal changing, until the output pin goes to a high-impedance state. 16. CY7C142/CY7C146 only. 17. A write operation on Port A, where Port A has priority, leaves the data on Port B’s outputs undisturbed until one access time after one of the following: BUSY on Port B goes HIGH. Port B’ ...
Page 6
... Address to INTERRUPT Reset Time INR Document #: 38-06031 Rev. *C 7C132-35 7C132-45 7C136-35 7C136-45 7C142-35 7C142-45 7C146-35 7C146-45 Min. Max. Min [15 [15 [16 Note 17 Note [15] 25 [15] 25 [15] 25 CY7C132/CY7C136 CY7C142/CY7C146 [5, 10] 7C132-55 7C136-55 7C142-55 7C146-55 Max. Min. Max. Unit Note 17 Note 17 ns Note 17 Note ...
Page 7
... Device is continuously selected and 21. Address valid prior to or coincident with CE transition LOW. Document #: 38-06031 Rev. *C [19, 20 ACE t DOE DATA VALID t RC ADDRESS MATCH t PWE VALID ADDRESS MATCH t BLA t WDD . IL CY7C132/CY7C136 CY7C142/CY7C146 DATA VALID t HZCE t HZOE BHA t BDD VALID t DDD Page [+] Feedback ...
Page 8
... If the CE LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in a high-impedance state. Document #: 38-06031 Rev. *C [14, 22 SCE PWE t SD DATA VALID HIGH IMPEDANCE [14, 23 SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE PWE HZWE . SD CY7C132/CY7C136 CY7C142/CY7C146 LZWE to allow the data I/O pins to enter high impedance SD Page [+] Feedback ...
Page 9
... Left Address Valid First ADDRESS ADDRESS MATCH ADDRESS R BUSY R Right Address Valid First ADDRESS ADDRESS MATCH ADDRESS L BUSY L Document #: 38-06031 Rev. *C ADDRESS MATCH BLC BHC ADDRESS MATCH BLC BHC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C132/CY7C136 CY7C142/CY7C146 Page [+] Feedback ...
Page 10
... Switching Waveforms (continued) Busy Timing Diagram No. 3 (Write with BUSY, Slave: CY7C142/CY7C146 BUSY Interrupt Timing Diagrams [18] Left Side Sets INT : R ADDRESS L t INS INT R Right Side Clears INT : R ADDRESS R INT R Right Side Sets INT : L ADDRESS R t INS CE R R/W ...
Page 11
... OUTPUT LOADING 1.25 30.0 25.0 1.0 20.0 15.0 0.75 10 4. 25° 200 400 600 800 1000 CAPACITANCE (pF) CY7C132/CY7C136 CY7C142/CY7C146 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 25° 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 25° 0.0 1 ...
Page 12
... Leadless Chip Carrier P25 48-Lead (600-Mil) Molded DIP P25 48-Lead (600-Mil) Molded DIP P25 48-Lead (600-Mil) Molded DIP P25 48-Lead (600-Mil) Molded DIP D26 48-Lead (600-Mil) Sidebraze DIP CY7C132/CY7C136 CY7C142/CY7C146 Operating Range Commercial Industrial Commercial Industrial Military Commercial Industrial Military Commercial ...
Page 13
... Ordering Code 45 CY7C142-45PC CY7C142-45PI CY7C142-45DMB 55 CY7C142-55PC CY7C142-55PI CY7C142-55DMB 15 CY7C146-15JC CY7C146-15NC 25 CY7C146-25JC CY7C146-25JXC CY7C146-25NC 30 CY7C146-30JC CY7C146-30NC CY7C146-30JI 35 CY7C146-35JC CY7C146-35NC CY7C146-35JI CY7C146-35LMB 45 CY7C146-45JC CY7C146-45NC CY7C146-45JI CY7C146-45LMB 55 CY7C146-55JC CY7C146-55JXC CY7C146-55NC CY7C146-55JI CY7C146-55LMB Document #: 38-06031 Rev. *C Package Name Package Type P25 48-Lead (600-Mil) Molded DIP ...
Page 14
... Write Cycle SCE PWE Busy/Interrupt Timing t BLA t BHA t BLC t BHC WINS t EINS t INS t OINR t EINR t INR BUSY TIMING BDD Note: 24. CY7C142/CY7C146 only. CY7C132/CY7C136 CY7C142/CY7C146 Subgroups 10, 11 [ 10, 11 Page [+] Feedback ...
Page 15
... Package Diagrams 52-Lead Pb-Free Plastic Leaded Chip Carrier J69 Document #: 38-06031 Rev. *C 48-Lead (600-Mil) Sidebraze DIP D26 MIL-STD-1835 D-14 Config. C 52-Lead Plastic Leaded Chip Carrier J69 CY7C132/CY7C136 CY7C142/CY7C146 51-80044-** 51-85004-*A Page [+] Feedback ...
Page 16
... Package Diagrams (continued) Document #: 38-06031 Rev. *C 52-Square Leadless Chip Carrier L69 52-Lead Plastic Quad Flatpack N52 52-Lead Pb-Free Plastic Quad Flatpack N52 CY7C132/CY7C136 CY7C142/CY7C146 51-80054-** 51-85042-** Page [+] Feedback ...
Page 17
... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 48-Lead (600-Mil) Molded DIP P25 CY7C132/CY7C136 CY7C142/CY7C146 51-85020-*A Page [+] Feedback ...
Page 18
... Document History Page Document Title: CY7C132/CY7C136/CY7C142/CY7C146 Dual Port Static RAM Document Number: 38-06031 Orig. of REV. ECN NO. Issue Date Change ** 110171 10/21/01 SZV *A 128959 09/03/03 JFU *B 236748 See ECN YDT *C 393184 See ECN YIM Document #: 38-06031 Rev. *C Description of Change Change from Spec number: 38-06031 ...