CY7C342B-25HC Cypress Semiconductor Corp, CY7C342B-25HC Datasheet - Page 6

• Manufacturer Part Number: CY7C342B-25HC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C342B-25HC

• Family Name: MAX®
• Memory Type: EPROM
• # Macrocells: 128
• Number Of Usable Gates: 2500
• Frequency (max): 62.5MHz
• Propagation Delay Time: 25ns
• Number Of Logic Blocks/elements: 8
• # I/os (max): 52
• Operating Supply Voltage (typ): 5V
• In System Programmable: No
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: Windowed LCC
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-03014 Rev. *B
Commercial and Industrial External Synchronous Switching Characteristics
Commercial and Industrial External Synchronous Switching Characteristics
Commercial and Industrial External Asynchronous Switching Characteristics
t
t
t
t
t
t
f
t
t
t
Notes:
t
t
t
t
t
t
t
f
t
t
f
Parameter
t
t
t
t
t
t
t
f
t
f
Parameter
ACO1
AS1
AH
AWH
AWL
ACNT
ACNT
ACO1
AS1
AH
PD1
PD2
SU
CO1
H
WH
WL
MAX
CNT
ODH
CNT
3. C1 = 35 pF.
4. The f
5. This parameter is measured with a 16-bit counter programmed into each LAB
6. This parameter is measured with a positive-edge triggered clock at the register. For negative edge triggering, the t
PD1
PD2
SU
CO1
H
WH
WL
MAX
CNT
CNT
Parameter
MAX
values represent the highest frequency for pipeline data.
Asynchronous Clock Input to Output Delay
Dedicated Input or Feedback Set-Up Time to Asynchronous Clock Input
Input Hold Time from Asynchronous Clock Input
Asynchronous Clock Input HIGH Time
Asynchronous Clock Input LOW Time
Minimum Internal Array Clock Frequency
Maximum Internal Array Clock Frequency
Asynchronous Clock Input to Output Delay
Dedicated Input or Feedback Set-Up Time to Asynchronous Clock Input
Input Hold Time from Asynchronous Clock Input
Dedicated Input to Combinatorial Output Delay
I/O Input to Combinatorial Output Delay
Global Clock Set-Up Time
Synchronous Clock Input to Output Delay
Input Hold Time from Synchronous Clock Input
Synchronous Clock Input HIGH Time
Synchronous Clock Input LOW Time
Maximum Register Toggle Frequency
Minimum Global Clock Period
Output Data Hold Time After Clock
Maximum Internal Global Clock Frequency
Dedicated Input to Combinatorial Output Delay
I/O Input to Combinatorial Output Delay
Global Clock Set-Up Time
Synchronous Clock Input to Output Delay
Input Hold Time from Synchronous Clock Input
Synchronous Clock Input HIGH Time
Synchronous Clock Input LOW Time
Maximum Register Toggle Frequency
Minimum Global Clock Period
Maximum Internal Global Clock Frequency
Description
USE ULTRA37000
Description
Description
ALL NEW DESIGNS
[6]
[4]
[6]
[4]
[3]
[5]
[3]
[3]
[3]
[3]
[5]
[3]
[5]
[3]
[3]
TM
FOR
7C342B-25
Min.
62.5
15
50
0
8
8
2
Max.
[6]
[5]
25
40
14
20
Min.
83.3
100
7C342B-15
10
Min.
83.3
0
5
5
7C342B-15
5
5
5
5
5
6
Min.
7C342B-30
AWH
20
10
10
50
40
0
2
Max.
15
25
12
and t
Max.
8
15
12
25
Over Operating Range
Max.
AWL
30
45
16
25
Over Operating Range
Over Operating Range
parameters must be swapped.
Min.
71.4
66.7
7C342B-20
13
Min.
66.7
0
7
7
7C342B–20
Min.
12.5
12.5
33.3
6
6
7
7
6
8
7C342B-35
25
40
0
2
CY7C342B
Max.
Max.
20
33
15
Max.
9
20
15
30
Page 6 of 14
35
55
20
30
MHZ
Unit
MHz
MHz
MHz
Unit
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
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