6N138TV Fairchild Semiconductor, 6N138TV Datasheet

6N138TV

Manufacturer Part Number
6N138TV
Description
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 6N138TV

Input Type
DC
Output Type
DC
Output Device
Darlington With Base
Number Of Elements
1
Reverse Breakdown Voltage
5V
Forward Voltage
1.7V
Forward Current
20mA
Collector Current (dc) (max)
60mA
Isolation Voltage
2500Vrms
Power Dissipation
100mW
Current Transfer Ratio
1300%
Pin Count
8
Mounting
Through Hole
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
Single-Channel: 6N138, 6N139
Dual-Channel: HCPL2730, HCPL2731
Low Input Current High Gain Split
Darlington Optocouplers
Features
Applications
Schematic
N/C
N/C
V
Low current – 0.5mA
Superior CMR-10kV/µs
CTR guaranteed 0–70°C
U.L. recognized (File # E90700)
VDE recognized (File # 120915) Ordering option V,
e.g., 6N138V
Dual Channel – HCPL2730, HCPL2731
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise line receiver
µP bus isolation
Current loop receiver
Superior CTR-2000%
+
_
F
4
1
2
3
6N138 / 6N139
8
7
6
5
GND
V
V
V
CC
B
O
V
V
+
_
_
+
F1
F2
HCPL2730 / HCPL2731
4
1
2
3
8
7
6
5
V
V
V
GND
Description
The 6N138/9 and HCPL2730/HCPL2731 optocouplers
consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector.
The split darlington configuration separating the input
photodiode and the first stage gain from the output
transistor permits lower output saturation voltage and
higher speed operation than possible with conventional
darlington phototransistor optocoupler. In the dual
channel devices, HCPL2730/HCPL2731, an integrated
emitter-base resistor provides superior stability over
temperature.
The combination of a very low input current of 0.5mA
and a high current transfer ratio of 2000% makes this
family particularly useful for input interface to MOS,
CMOS, LSTTL and EIA RS232C, while output compati-
bility is ensured to CMOS as well as high fan-out TTL
requirements. An internal noise shield provides excep-
tional common mode rejection of 10 kV/µs.
01
02
CC
Package Outlines
8
1
8
1
8
www.fairchildsemi.com
August 2008
1

Related parts for 6N138TV

6N138TV Summary of contents

Page 1

... O GND 4 5 N/C 6N138 / 6N139 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 Description The 6N138/9 and HCPL2730/HCPL2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. The split darlington configuration separating the input photodiode and the fi ...

Page 2

... O V Emitter-Base Reverse Voltage Supply Voltage, Output Voltage Output Power Dissipation O ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0 25°C unless otherwise specified) A Parameter Each Channel Each Channel Each Channel Each Channel Each Channel 6N138 and 6N139 6N138, HCPL2730 ...

Page 3

... Transfer Characteristics Symbol Parameter COUPLED CTR Current Transfer (1)(2) Ratio V Logic LOW Output OL (2) Voltage *All Typicals 25°C A ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0 70°C unless otherwise specified) A Test Conditions T = 25°C A Each channel (I = 1.6mA 25° 10µA A ...

Page 4

... I H Transient R Immunity at Logic (3) HIGH (Fig. 25) |CM | Common Mode (I L Transient T Immunity at Logic (3) LOW (Fig. 25) ** All Typicals 25°C A ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued 70°C unless otherwise specified 5V) CC Test Conditions = 4 0.5mA 25° 4 0.5mA 25°C A ...

Page 5

... Device is considered a two terminal device: Pins and 4 are shorted together and Pins and 8 are shorted together. 5. For dual channel devices, C I-O shorted together. 6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. I ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued 70°C unless otherwise specified) A Test Conditions Relative humidity = 45%,T ...

Page 6

... I = Load Current Through L Resistor Input Current of Output Gate 2 V DD1 Fig. 2 Non-Inverting Logic Interface ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued 25°C unless otherwise specified) A OL1 CMOS INPUT R1 ( (V) CMOS NON-INV. 2000 1000 @ 5V INV. 510 CMOS NON-INV ...

Page 7

... Load Resistance (6N138 / 6N139 Only) 100 T = 25˚ ADJUSTED FOR 0 LOAD RESISTANCE ( Fig. 8 Propagation Delay To Logic Low vs. Base-Emitter Resistance (HCPL2730 / HCPL2731 Only 0.01 0.1 RBE - BASE-EMITTER RESISTANCE - M ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0 -40˚C A 1.4 1.5 1.6 ( 1 Normalized None ...

Page 8

... T = 85˚ 70˚ 25˚ 0˚ -40˚ 0.01 0 INPUT DIODE FORWARD CURRENT -mA ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued) Fig. 11 Current Transfer Ratio vs. Forward Current 5000 4000 3000 2000 1000 I = 1.6mA 0 100 1000 0.1 Fig. 13 Output Current vs Output Voltage 120 4 ...

Page 9

... Fig. 20 Propagation Delay to Logic Low vs. Pulse Period (6N138 / 6N139 Only) 100 6N139 I = 0.5mA 4.7k L 6N138 I = 1.6mA 2.2k L 0.1 0.01 0 INPUT PULSE PERIOD - ms ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued) 100 18V Fig. 19 Propagation Delay vs. Input Diode Forward Current ...

Page 10

... HCPL2730 : I = 1 HCPL2731 : I = 0 (HCPL2731) PLH (HCPL2731) PHL 10 t (HCPL2730) PHL TEMPERATURE (˚C) A ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 (Continued) 50 HCPL2730 : I HCPL2731 : (HCPL2730) PLH Fig. 23 Propagation Delay vs. Temperature (HCPL2730 / HCPL2731 Only) = 1.6mA 2. 0.5mA 4. (HCPL2731) PLH ...

Page 11

... I/ < 100ns 3 I Monitor Test Circuit for 6N138, 6N139 I F Noise Shield Pulse Gen Test Circuit for 6N138 and 6N139 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 Pulse Generator 5ns Z = 50V 10% DUTY CYCLE I/f < 100 µ 0.1 µF ...

Page 12

... MIN 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 0.4" Lead Spacing 0.200 (5.08) 0.140 (3.55) 15 MAX 0.300 (7.62) TYP 0.022 (0.56) 0.016 (0.41) 8-Pin DIP – ...

Page 13

... WV SV SDV Marking Information Definitions ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 Example Part Number 6N138 Standard Through Hole Device, 50 pcs per tube 6N138S Surface Mount Lead Bend 6N138SD Surface Mount; Tape and reel 6N138W 0.4" Lead Spacing ...

Page 14

... MAX User Direction of Feed Reflow Profile 300 250 200 150 100 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5 12.0 0.1 4.0 0.1 4.0 0.1 0.05 10.30 0.20 225C peak Time above 183C, 60–150 sec ...

Page 15

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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