IS61C6416-12T ISSI, Integrated Silicon Solution Inc, IS61C6416-12T Datasheet
IS61C6416-12T
Specifications of IS61C6416-12T
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IS61C6416-12T Summary of contents
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... Easy memory expansion is provided by using Chip Enable and Output Enable inputs, WE Enable ( ) controls both writing and reading of the memory.A data byte allows Upper Byte ( The IS61C6416 is packaged in the JEDEC standard 44-pin 400-mil SOJ and 44-pin TSOP (Type II). DECODER MEMORY ARRAY I/O COLUMN I/O ...
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... IS61C6416 PIN CONFIGURATIONS 44-Pin SOJ A15 A14 A13 A12 A11 I/ I/O15 I/ I/O14 I/ I/O13 I/ I/O12 Vcc 11 34 GND GND 12 33 Vcc I/ I/O11 I/ I/O10 I/ I/ A10 PIN DESCRIPTIONS A0-A15 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input ...
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... IS61C6416 ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM T Storage Temperature STG P Power Dissipation Output Current (LOW) OUT OPERATING RANGE Range Ambient Temperature Commercial +70 C Industrial – + ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage ...
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... IS61C6416 CAPACITANCE (1) Symbol Parameter C Input Capacitance IN C Input/Output Capacitance OUT Note: 1. Tested initially and after any design or process changes that may affect these parameters. READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time ...
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... IS61C6416 AC WAVEFORMS (1,2) READ CYCLE NO. 1 (Address Controlled) ( ADDRESS D OUT PREVIOUS DATA VALID READ CYCLE NO. 2 (1,3) ADDRESS LZCE LB LZB HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. 3. Address is valid prior to or coincident with Integrated Silicon Solution, Inc. — 1-800-379-4774 ...
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... IS61C6416 WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End SCE t Address Setup Time AW to Write End t Address Hold from Write End HA t Address Setup Time Valid to End of Write PWB Pulse Width ( 1 PWE Pulse Width ( 2 PWE t Data Setup to Write End ...
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... IS61C6416 AC WAVEFORMS WRITE CYCLE NO Controlled) ADDRESS UB DATA UNDEFINED OUT D IN Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the LB UB one of the and inputs being in the LOW state WRITE = ( ) ( ) = ( ) ( ). Integrated Silicon Solution, Inc. — 1-800-379-4774 SR005-1D 05/24/99 ...
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... IS61C6416 OE WRITE CYCLE NO HIGH During Write Cycle) ADDRESS OE CE LOW UB DATA UNDEFINED OUT WRITE CYCLE NO LOW During Write Cycle) ADDRESS OE LOW CE LOW UB DATA UNDEFINED OUT D IN Notes: 1. The internal write time is defined by the overlap of but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write ...
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... HA t PBW WORD 2 t LZWE DATA IN VALID Order Part No. Package IS61C6416-12TI Plastic TSOP(II) IS61C6416-12KI 400-mil Plastic SOJ IS61C6416-15TI Plastic TSOP(II) IS61C6416-15KI 400-mil Plastic SOJ IS61C6416-20TI Plastic TSOP(II) IS61C6416-20KI 400-mil Plastic SOJ ISSI Integrated Silicon Solution, Inc. 2231 Lawson Lane Santa Clara, CA 95054 ...