CY62128BLL-70SI Cypress Semiconductor Corp, CY62128BLL-70SI Datasheet - Page 5

• Manufacturer Part Number: CY62128BLL-70SI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62128BLL-70SI

• Density: 1Mb
• Access Time (max): 70ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 17b
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 15mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05300 Rev. *C
Switching Characteristics
Switching Waveforms
Read Cycle No.1
Notes:
10. The internal write time of the memory is defined by the overlap of CE
11. No input may exceed V
12. Device is continuously selected. OE, CE
13. WE is HIGH for read cycle.
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
7.
8.
9.
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
Parameter
DATA OUT
ADDRESS
Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
t
At any given temperature and voltage condition, t
and the transition of any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates
the write.
OL
HZOE
/I
OH
, t
HZCE
and 100-pF load capacitance.
, and t
[10]
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE
CE
CE
CE
Write Cycle Time
CE
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
HZWE
[12, 13]
1
1
1
1
1
1
are specified with a load capacitance of 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
LOW to Data Valid, CE
LOW to Low Z, CE
HIGH to High Z, CE
LOW to Power-up, CE
HIGH to Power-down, CE
LOW to Write End, CE
CC
+ 0.5V.
PREVIOUS DATA VALID
[7]
1
Over the Operating Range
= V
[9]
[8, 9]
[7, 9]
IL
, CE
t
Description
2
OHA
2
HZCE
HIGH to Low Z
2
LOW to High Z
= V
2
2
2
HIGH to Power-up
HIGH to Write End
is less than t
IH
HIGH to Data Valid
.
2
LOW to Power-down
t
AA
LZCE
1
[9]
, t
[8, 9]
LOW, CE
HZOE
is less than t
t
2
RC
HIGH, and WE LOW. CE
LZOE
, and t
HZWE
Min.
55
55
45
45
45
25
62128B-55
5
0
0
0
5
0
0
5
is less than t
1
and WE must be LOW and CE
Max.
55
55
20
20
20
55
20
LZWE
DATA VALID
for any given device.
Min.
70
70
60
60
50
30
62128B-70
5
0
5
0
0
0
0
5
2
CY62128B
HIGH to initiate a write,
Max.
70
70
35
25
25
70
25
MoBL
Page 5 of 11
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
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