CY62128DV30L-55ZAI Cypress Semiconductor Corp, CY62128DV30L-55ZAI Datasheet - Page 2

• Manufacturer Part Number: CY62128DV30L-55ZAI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62128DV30L-55ZAI

• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05231 Rev. *H
Pin Configurations
Product Portfolio
Notes:
CY62128DV30L
CY62128DV30LL
2. NC pins are not connected to the die.
3. DNU pins have to be left floating or tied to Vss to ensure proper application.
4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
GND
DNU
I/O
I/O
I/O
A
A
A
A
A
A
A
A
A
A
A
16
14
12
7
6
5
4
3
2
1
0
0
1
2
Product
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
Top View
SOIC
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Min.
2.2
CE
A
CE
I/O
I/O
I/O
I/O
I/O
V
A
WE
A
A
A
A
OE
[2]
10
CC
15
13
8
9
11
2
1
7
6
5
4
3
V
CC
DNU
CE
V
WE
A
A
A
A
A
A
CC
A
A
A
A
A
A
11
13
15
16
14
12
9
8
2
7
6
5
4
Range (V)
Typ.
3.0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Max.
3.6
(not to scale)
Top View
TSOP I
Speed
55/70
55/70
(ns)
DNU
V
CE
A
A
A
A
WE
A
A
CC
A
A
A
A
A
A
12
14
16
15
13
11
4
5
6
7
2
8
9
Typ.
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0.85
0.85
f = 1 MHz
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
[4]
OE
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
Reverse TSOP I
Operating, I
10
0
1
2
3
(not to scale)
1
7
6
5
4
3
2
1
0
Max.
Top View
1.5
1.5
DNU
CE
V
WE
A
A
A
A
A
A
A
A
CC
A
A
A
A
13
15
16
14
12
11
9
8
2
7
6
5
4
25
26
27
26
28
29
30
31
32
1
2
3
4
5
6
7
8
Power Dissipation
CC
Typ.
5
5
(mA)
[4]
f = f
CC
(not to scale)
= V
MAX
Top View
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
STSOP
CC(typ)
Max.
10
10
A
A
A
A
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
CE
A
OE
3
2
1
0
10
0
1
2
3
4
5
6
7
1
, T
CY62128DV30
A
= 25°C.
Standby, I
Typ.
1.5
1.5
[4]
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
Page 2 of 11
OE
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
SB2
10
0
1
2
3
7
6
5
4
3
2
1
0
1
Max.
5
4
(µA)
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