CY7C1020CV33-15ZI Cypress Semiconductor Corp, CY7C1020CV33-15ZI Datasheet

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CY7C1020CV33-15ZI

Manufacturer Part Number
CY7C1020CV33-15ZI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1020CV33-15ZI

Density
512Kb
Access Time (max)
15ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP
Operating Temp Range
-40C to 85C
Supply Current
80mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Lead Free Status / Rohs Status
Not Compliant
Cypress Semiconductor Corporation
Document #: 38-05133 Rev. *B
Features
Functional Description
The CY7C1020CV33 is a high-performance CMOS static
RAM organized as 32,768 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Logic Block Diagram
• Pin- and function-compatible with CY7C1020V33
• High speed
• CMOS for optimum speed/power
• Low active power
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II
A
A
A
A
A
A
A
A
— t
— 360 mW (max.)
4
3
2
1
0
7
6
5
AA
= 10, 12, 15 ns
DATA IN DRIVERS
COLUMN DECODER
RAM Array
32K × 16
3901 North First Street
1020CV33-10
10
90
5
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1020CV33 is available in standard 44-pin TSOP
Type II packages.
I/O
I/O
1020CV33-12
14
1
9
BHE
WE
CE
OE
BLE
San Jose
). If Byte High Enable (BHE) is LOW, then data
–I/O
–I/O
12
85
5
8
16
9
32K x 16 Static RAM
through I/O
1
to I/O
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
Pin Configuration
WE
A
A
A
A
NC
CE
CC
NC
A
A
A
A
SS
14
13
12
4
1
3
2
1
0
1
2
3
4
5
6
7
8
CA 95134
through I/O
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
. If Byte High Enable (BHE) is
16
TSOP II
Top View
0
) is written into the location
through A
1020CV33-15
Revised August 13, 2002
CY7C1020CV33
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
15
80
5
16
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
NC
) are placed in a
1
14
5
6
7
SS
CC
8
9
10
11
through I/O
16
15
14
13
12
11
10
9
).
408-943-2600
9
to I/O
16
Unit
mA
mA
. See
ns
8
), is
0

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CY7C1020CV33-15ZI Summary of contents

Page 1

... The input/output pins (I/O high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020CV33 is available in standard 44-pin TSOP Type II packages. I/O –I/O 1 I/O – ...

Page 2

... CE > > < MAX Max > V – 0.3V, V > – 0.3V < 0.3V Test Conditions MHz 3.3V CC CY7C1020CV33 [1] ................................ –0. Ambient Temperature +70 C – +85 C 1020CV33-12 1020CV33-15 Max. Min. Max. Min. 2.4 2.4 0 0.3 0.3 0.8 –0.3 0.8 –0.3 +1 –1 +1 –1 +1 –1 +1 – ...

Page 3

... Document #: 38-05133 Rev. *B [4] R2 ALL INPUT PULSES 3.0V 90% 10% GND (b) Rise Time: 1 V/ns [4] 1020CV33-10 Min. Max [ [ less than less than t HZCE LZCE HZOE CY7C1020CV33 High-Z characteristics: R 317 3.3V OUTPUT 5 pF (c) 90% 10% Fall Time: 1 V/ns 1020CV33-12 1020CV33-15 Min. Max. Min ...

Page 4

... Device is continuously selected. OE, CE, BHE and/or BHE = V 10 HIGH for Read cycle. 11. Address valid prior to or coincident with CE transition LOW. Document #: 38-05133 Rev OHA [10, 11 ACE t DOE t LZOE t DBE t LZBE 50 CY7C1020CV33 DATA VALID t HZOE t HZCE t HZBE IMPEDANCE DATA VALID t PD 50% HIGH I ICC CC I ISB SB Page ...

Page 5

... Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 12. Data I/O is high impedance BHE and/or BLE = V 13 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05133 Rev. *B [12, 13 SCE PWE PWE t SCE . IH CY7C1020CV33 Page ...

Page 6

... H Data High High High-Z Ordering Information Speed (ns) Ordering Code 10 CY7C1020CV33-10ZC CY7C1020CV33-10ZI 12 CY7C1020CV33-12ZC CY7C1020CV33-12ZI 15 CY7C1020CV33-15ZC CY7C1020CV33-15ZI Document #: 38-05133 Rev SCE PWE HZWE I/O –I/O I/O –I High-Z Power-down Data Out Read—All bits High-Z Read—Lower bits only Data Out Read—Upper bits only Data In Write— ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 44-Pin TSOP II Z44 CY7C1020CV33 51-85087-A Page ...

Page 8

... Document Title: CY7C1020CV33 32K x 16 Static RAM Document Number: 38-05133 Issue REV. ECN NO. Date ** 109428 12/16/01 *A 115045 05/30/02 *B 117615 08/14/02 Document #: 38-05133 Rev. *B Orig. of Change Description of Change HGK New Data Sheet HGK I and I data modified CC SB1 DFP Pin 1= NC Pin 18 = A4; remove SOJ package option; remove 8ns option. ...

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