CY7C1021-12ZC Cypress Semiconductor Corp, CY7C1021-12ZC Datasheet - Page 3
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CY7C1021-12ZC
Manufacturer Part Number
CY7C1021-12ZC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1021-12ZC.pdf
(9 pages)
Specifications of CY7C1021-12ZC
Density
1Mb
Access Time (max)
12ns
Operating Supply Voltage (typ)
5V
Package Type
TSOP
Operating Temp Range
0C to 70C
Supply Current
220mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1021-12ZC
Manufacturer:
CYPRESS
Quantity:
748
Part Number:
CY7C1021-12ZC
Manufacturer:
CYP
Quantity:
20 000
AC Test Loads and Waveforms
OUTPUT
Switching Characteristics
Document #: 38-05054 Rev. **
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
t
Shaded areas contain preliminary information.
Notes:
Parameter
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
BW
5.
6.
7.
8.
Equivalent to: THÉVENIN
INCLUDING
JIG AND
SCOPE
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
At any given temperature and voltage condition, t
t
The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a write,
and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
5V
OL
HZOE
/I
OH
, t
and 30-pF load capacitance.
HZBE
30 pF
, t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable to Data Valid
Byte Enable to Low Z
Byte Disable to High Z
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
Byte Enable to End of Write
HZCE
(a)
[8]
EQUIVALENT
R 481
, and t
HZWE
Description
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
255
OUTPUT
R2
[6]
[6]
[5]
[6, 7]
[6]
[6, 7]
[6, 7]
OUTPUT
Over the Operating Range
INCLUDING
JIG AND
SCOPE
5V
HZCE
30 pF
167
5 pF
is less than t
(b)
R 481
Min.
LZCE
7C1021-10
10
10
3
0
3
0
0
8
7
0
0
7
5
0
3
7
, t
1.73V
1021-3
HZOE
Max.
is less than t
10
10
10
255
5
5
5
5
5
5
R2
Min.
7C1021-12
LZOE
12
12
GND
3
0
3
0
0
9
8
0
0
8
6
0
3
8
3.0V
, and t
< 3 ns
Max.
HZWE
12
12
12
6
6
6
6
6
6
is less than t
Min.
7C1021-15
15
15
10
10
10
3
0
3
0
0
0
0
8
0
3
9
10%
90%
LZWE
ALL INPUT PULSES
Max.
15
15
15
for any given device.
7
7
7
7
7
7
Min.
7C1021-20
20
20
12
12
12
10
12
3
0
3
0
0
0
0
0
3
CY7C1021
Max.
20
20
20
9
9
9
9
9
9
Page 3 of 9
90%
10%
1021-4
< 3 ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns