CY7C187-15VC Cypress Semiconductor Corp, CY7C187-15VC Datasheet
CY7C187-15VC
Manufacturer Part Number
CY7C187-15VC
Description
Manufacturer
Cypress Semiconductor Corp
Specifications of CY7C187-15VC
Density
64Kb
Access Time (max)
15ns
Operating Supply Voltage (typ)
5V
Package Type
SOJ
Operating Temp Range
0C to 70C
Supply Current
90mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
24
Word Size
1b
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C187-15VC
Manufacturer:
SC
Quantity:
1 000
Part Number:
CY7C187-15VC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-05044 Rev. **
Features
Functional Description
The CY7C187 is a high-performance CMOS static RAM orga-
nized as 65,536 words x 1 bit. Easy memory expansion is pro-
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Note:
• High speed
• CMOS for optimum speed/power
• Low active power
• Low standby power
• TTL compatible inputs and outputs
• Automatic power-down when deselected
1.
A
A
A
A
— 15 ns
— 495 mW
— 220 mW
Logic Block Diagram
A
A
A
A
12
13
14
15
0
1
2
3
For military specifications, see the CY7C187A datasheet.
INPUT BUFFER
COLUMN DECODER
[1]
256 x 256
ARRAY
POWER
DOWN
•
3901 North First Street
7C187-15
40/20
15
90
C187–1
DI
DO
CE
WE
vided by an active LOW Chip Enable (CE) and three-state driv-
ers. The CY7C187 has an automatic power-down feature,
reducing the power consumption by 56% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
the address pins (A
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied on the address pin will appear on the data output (D
pin.
The output pin stays in high-impedance state when Chip En-
able (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C187 utilizes a die coat to insure alpha immunity.
Pin Configurations
D
•
GND
OUT
WE
NC
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
7C187-20
IN
San Jose
Top View
10
11
12
) is written into the memory location specified on
40/20
1
2
3
4
5
6
7
8
9
20
80
SOJ
0
24
23
22
21
20
19
18
17
16
15
14
13
through A
C187–3
64K x 1 Static RAM
•
V
A
A
A
A
NC
A
A
A
A
D
CE
CC
15
14
13
12
11
10
9
8
IN
CA 95134
7C187-25
15
20/20
).
25
70
D
GND
Revised August 24, 2001
WE
OUT
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
Top View
1
2
3
4
5
6
7
8
9
10
11
•
DIP
CY7C187
408-943-2600
7C187-35
22
21
20
19
18
17
16
15
14
13
12
C187–2
20/20
35
70
V
A
A
A
A
A
A
A
A
D
CE
CC
15
14
13
12
11
10
9
8
IN
OUT
)
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