AM29LV033C-90EI Spansion Inc., AM29LV033C-90EI Datasheet - Page 12

• Manufacturer Part Number: AM29LV033C-90EI
• Manufacturer: Spansion Inc.

Specifications of AM29LV033C-90EI

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 22b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 4M
• Supply Current: 16mA
• Mounting: Surface Mount
• Pin Count: 40
• Lead Free Status / Rohs Status: Not Compliant

An erase operation can erase one sector, multiple sec-
tors, or the entire device.
cates the address space that each sector occupies. A
“sector address” consists of the address bits required
to uniquely select a sector. The “Command Defini-
tions” section contains details for erasing a sector or
the entire chip, or suspending/resuming the erase op-
eration.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in
this mode. Refer to the
and
sections for more information.
I
tive current specification for the write mode. The
Characteristics” on page 34
specification tables and timing diagrams for write oper-
ations.
Accelerated Program Operation
The device offers accelerated program operations
through the ACC function. This is one of two functions
provided by the ACC pin. This function is primarily in-
tended to allow faster manufacturing throughput at the
factory.
If the system asserts V
matically enters the aforementioned Unlock Bypass
mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the
time required for program operations. The system then
uses a two-cycle program command sequence as re-
quired by the Unlock Bypass mode. Removing V
from the ACC pin returns the device to normal opera-
tion. Note that the ACC pin must not be at V
erations other than accelerated programming, or
device damage may result.
Program and Erase Operation Status
During an erase or program operation, the system
checks the status of the operation by reading the sta-
tus bits on DQ7–DQ0. Standard read cycle timings
and I
eration Status” on page 26
to
grams.
Standby Mode
When the system is not reading or writing to the de-
vice, it can place the device in the standby mode. In
this mode, current consumption is greatly reduced,
and the outputs are placed in the high impedance
state, independent of the OE# input.
10
CC2
“AC Characteristics” on page 34
in the DC Characteristics table represents the ac-
“Autoselect Command Sequence” on page 21
CC
read specifications apply. Refer to
HH
“Autoselect Mode” on page 15
on this pin, the device auto-
Table 2, on page 13
for more information, and
section contains timing
for timing dia-
“Write Op-
D A T A
HH
for op-
indi-
Am29LV033C
“AC
HH
S H E E T
The device enters the CMOS standby mode when the
CE# and RESET# pins are both held at V
(Note that this is a more restricted voltage range than
V
V
standby current is greater. The device requires stan-
dard access time (t
vice is in either of these standby modes, before it is
ready to read data.
The device also enters the standby mode when the
RESET# pin is driven low. Refer to the next section,
“RESET#: Hardware Reset
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
I
standby current specification.
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device
energy consumption. The device automatically
enables this mode when addresses remain stable for
t
independent of the CE#, WE#, and OE# control
signals. Standard address access timings provide new
data when addresses are changed. While in sleep
mode, output data is latched and always available to
the system. I
repr esen ts th e automatic sleep mo de cu rren t
specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the RE-
SET# pin is driven low for at least a period of t
device immediately terminates any operation in
progress, tristates all output pins, and ignores all
read/write commands for the duration of the RESET#
pulse. The device also resets the internal state ma-
chine to reading array data. The operation that was in-
terrupted should be reinitiated once the device is
ready to accept another command sequence, to en-
sure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at V
draws CMOS standby current (I
at V
greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would also reset the Flash mem-
ory, enabling the system to read the boot-up firmware
from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until the
internal reset operation is complete, which requires a
CC3
A C C
IH
CC
.) If CE# and RESET# are held at V
± 0.3 V, the device is in the standby mode, but the
IL
in the DC Characteristics table represents the
+ 3 0 n s . T h e a u t o m a t i c s l e e p m o d e i s
but not within V
CC4
in the DC Characteristics table
CE
SS
) for read access when the de-
22268B5 September 12, 2006
±0.3 V, the standby current is
Pin”.
CC4
SS
). If RESET# is held
±0.3 V, the device
IH
, but not within
CC
± 0.3 V.
RP
, the