LP2996LQX National Semiconductor, LP2996LQX Datasheet - Page 11

• Manufacturer Part Number: LP2996LQX
• Manufacturer: National Semiconductor

Specifications of LP2996LQX

• Voltage Regulator Type: Linear
• Topology: LDO
• Regulator Output Type: Fixed
• Polarity Type: Positive
• Number Of Outputs: Single
• Input Voltage (min): 2.2V
• Input Voltage (max): 5.5V
• Output Voltage: 1.159/1.259/1.359V
• Package Type: LLP EP
• Output Current: 1.5A
• Operating Temp Range: 0C to 125C
• Operating Temperature Classification: Commercial
• Pin Count: 16
• Mounting: Surface Mount
• Quiescent Current (max): 500uA
• Dc: 0352
• Lead Free Status / Rohs Status: Not Compliant

Typical Application Circuits
Several different application circuits have been shown in
ure 5
are possible in configuring the LP2996. Graphs of the indi-
vidual circuit performance can be found in the Typical Perfor-
mance Characteristics section in the beginning of the
datasheet. These curves illustrate how the maximum output
current is affected by changes in AVIN and PVIN.
If power dissipation or efficiency is a major concern then the
LP2996 has the ability to operate on split power rails. The
output stage (PVIN) can be operated on a lower rail such as
1.8V and the analog circuitry (AVIN) can be connected to a
higher rail such as 2.5V, 3.3V or 5V. This allows the internal
power dissipation to be lowered when sourcing current from
The third option for SSTL-2 applications in the situation that
a 1.8V rail is not available and it is not desirable to use 2.5V,
is to connect the LP2996 power rail to 3.3V. In this situation
AVIN will be limited to operation on the 3.3V or 5V rail as PVIN
can never exceed AVIN. This configuration has the ability to
provide the maximum continuous output current at the down-
through
Figure 14
to illustrate some of the options that
FIGURE 6. Lower Power Dissipation SSTL-2 Implementation
FIGURE 5. Recommended SSTL-2 Implementation
Fig-
11
SSTL-2 APPLICATIONS
For the majority of applications that implement the SSTL-2
termination scheme it is recommended to connect all the input
rails to the 2.5V rail. This provides an optimal trade-off be-
tween power dissipation and component count and selection.
An example of this circuit can be seen in
V
continuous current is reduced because of the lower rail volt-
age, although it is adequate for all motherboard SSTL-2 ap-
plications. Increasing the output capacitance can also help if
periods of large load transients will be encountered.
side of higher thermal dissipation. Care should be taken to
prevent the LP2996 from experiencing large current levels
which cause the junction temperature to exceed the maxi-
mum. Because of this risk it is not recommended to supply
the output stage with a voltage higher than a nominal 3.3V
rail.
TT
. The disadvantage of this circuit is that the maximum
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Figure
5.
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