BCM5704CKFB Broadcom, BCM5704CKFB Datasheet

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BCM5704CKFB

Manufacturer Part Number
BCM5704CKFB
Description
Manufacturer
Broadcom
Datasheet

Specifications of BCM5704CKFB

Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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DUAL 10/100/1000BASE-T CONTROLLER WITH INTEGRATED TRANSCEIVER
Single-chip, dual-port solution for dual LAN on Motherboard
(LOM) and network interface card (NIC) applications
• Two integrated 10BASE-T/100BASE-TX/1000BASE-T transceivers
• Two 10/100/1000 triple-speed MACs
• Single host interface
• Dual ultradeep 64 KB on-chip packet buffer
• Dual high-speed RISC cores with 16 KB caches
• SMBus 2.0 controller
• On-chip power circuit controller and Wake-on-LAN (WOL)
Performance features
• TCP, IP, UDP checksum
• TCP segmentation
• CPU task offload
• Adaptive interrupts
• Ultradeep 64 KB packet buffer
Robust manageability
• PXE 2.0 remote boot
• Alert Standard Format: ASF 1.0 support
• WOL
• Out-of-box WOL
• Intelligent Platform Management Interface (IPMI), ver. 1.5
• Statistic gathering (SNMP MIB II, Ethernet-like MIB, Ethernet MIB)
• Comprehensive diagnostic and configuration software suite
• ACPI 1.1a-compliant (multiple power modes)
Advanced network features
• Priority queuing: 802.1p Layer 2 priority encoding; support for
• Virtual LANs: 802.1q VLAN tagging; support for up to 64 VLANs
• Jumbo frames (9 KB)
• IEEE 802.3x flow control
Advanced server features
• Link aggregation: IEEE 802.3ad, GEC/FEC, Smart Load
• Heterogeneous, mixed speed failover
• Hot-Plug PCI support
Low-power, 0.13 µm CMOS design
300-pin HBGA package
3.3V I/Os (5V tolerant)
JTAG
power switching circuit
four priority queues
Balancing (supports heterogeneous teams)
- PCI v2.2 32/64-bit, 33/66 MHz
- PCI-X v1.0 64-bit, 66/100/133 MHz
- Programmable, in-line packet classification
F E A T U R E S
®
BCM5704C
Brief
Industry’s smallest dual 10/100/1000 MAC/PHY solution:
power and space optimized for LOM and low-profile NIC
applications
Completely backward compatible
• To existing 10/100 network infrastructure
• To existing PCI-based desktop and server platforms
Future-proof
• PCI-X interface, on-chip programmable CPUs, ASF support
Performance focused: optimized for throughput and CPU
utilization
• Adaptive interrupts
• PCI-X eliminates PCI bottlenecks.
• Ultradeep 64 KB packet buffer lowers CPU utilization, avoids
• Networking task offloads reduces utilization level of CPU.
Robust and highly manageable
• PXE 2.0, ACPI 1.1, WOL, ASF 1.0, IPMI
• Integrated cable testing (link quality, length, pair skew, pair
Advanced features
• VLAN, priority queuing, jumbo frames
• RISC processors for advanced packet classification
Server class reliability, availability, and performance features
• Link aggregation and load balancing
• Failover
• Hot-plug PCI
Low power for zero airflow implementations
• 0.13 µm CMOS design
• Advanced power management
Space savings for LOM
• 300-pin HBGA package
• No external memory
• Integrated power circuitry
PCI congestion.
polarity, pair swap)
- Switch-dependent
- 802.3ad (LACP), generic trunking (GEC/FEC)
- Switch- and NIC-independent
- Smart Load Balancing (unique technology that supports
- Smart Load Balancing™ allows heterogeneous failover.
S U M M A R Y O F B E N E F I T S
heterogeneous teams and can operate with any switch)

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BCM5704CKFB Summary of contents

Page 1

DUAL 10/100/1000BASE-T CONTROLLER WITH INTEGRATED TRANSCEIVER • Single-chip, dual-port solution for dual LAN on Motherboard (LOM) and network interface card (NIC) applications • Two integrated 10BASE-T/100BASE-TX/1000BASE-T transceivers • Two 10/100/1000 triple-speed ...

Page 2

... Broadcom , the pulse logo, Connecting everything and Smart Load Balancing™ are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners. ...

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