W49F102P-45 Winbond Electronics, W49F102P-45 Datasheet
W49F102P-45
Specifications of W49F102P-45
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W49F102P-45 Summary of contents
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... GENERAL DESCRIPTION The W49F102 is a 1-megabit, 5-volt only CMOS flash memory organized as 64K can be programmed and erased in-system with a standard 5V power supply. A 12-volt V required. The unique cell architecture of the W49F102 results in fast program/erase operations with extremely low current consumption (compared to other comparable 5-volt flash memory products). The device can also be programmed and erased using standard EPROM programmers ...
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PIN CONFIGURATIONS A9 1 A10 2 A11 3 A12 4 A13 5 A14 6 A15 40-pin 9 #WE 10 STSOP #CE 13 DQ15 DQ14 14 DQ13 15 DQ12 16 DQ11 17 DQ10 ...
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FUNCTIONAL DESCRIPTION Read Mode The read operation of the W49F102 is controlled by #CE and #OE , both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When ...
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Program Operation The W49F102 is programmed on a word-by-word basis. Program operation can only change logical data "1" to logical data "0" The erase operation (changed entire data in main memory and/or boot block from "0" to "1" is needed ...
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TABLE OF OPERATING MODES Operating Mode Selection (V = 12V 5%) HH MODE #CE Read V IL Write V IL Standby V IH Write Inhibit X X Output Disable X Product TABLE OF COMMAND DEFINITION ...
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Embedded Programming Algorithm Increment Address Program Command Sequence (Address/Command): Start Write Program Command Sequence (see below) #Data Polling/ Toggle bit No Last Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program Data - 6 - W49F102 Pause T BP ...
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Embedded Erase Algorithm Chip Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H Start Write Erase Command Sequence (see below) #Data Polling or Toggle Bit Successfully Completed Erasure Completed Main Memory Erase Command Sequence (Address/Command): Publication Release Date: February ...
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Embedded #Data Polling Algorithm No Embedded Toggle Bit Algorithm Yes Start VA = Byte address for programming = Any of the sector addresses within Read Byte the sector being erased during sector (DQ0 - DQ7) erase operation Address = VA ...
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Software Product Identification and Boot Block Lockout Detection Acquisition Flow Product Identification Entry (1) Load data AA to address 5555 Load data 55 to address 2AAA Load data 90 to address 5555 Pause 10 S Notes for software product identification/boot ...
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Boot Block Lockout Enable Acquisition Flow Boot Block Lockout Feature Set Flow Load data AA to address 5555 Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 to ...
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DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Power Supply Voltage Operating Temperature Storage Temperature D.C. Voltage on Any Pin to Ground Potential Except #OE Transient Voltage (<20 nS) on Any Pin to Ground Potential Voltage on #OE Pin ...
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Power-up Timing PARAMETER Power-up to Read Operation Power-up to Write Operation CAPACITANCE (V = 5.0V MHz PARAMETER I/O Pin Capacitance Input Capacitance AC CHARACTERISTICS AC Test Conditions PARAMETER Input Pulse Levels ...
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AC Characteristics, continued Read Cycle Timing Parameters ( for for 45 nS PARAMETER Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access ...
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AC Characteristics, continued Data Polling and Toggle Bit Timing Parameters PARAMETER #OE to Data Polling Output Delay #CE to Data Polling Output Delay #OE to Toggle Bit Output Delay #CE to Toggle Bit Output Delay TIMING WAVEFORMS Read Cycle Timing ...
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Timing Waveforms, continued Controlled Command Write Cycle Timing Diagram #WE Address A15-0 #CE #OE #WE DQ15-0 Controlled Command Write Cycle Timing Diagram #CE Address A15-0 #CE #OE #WE DQ15 OES ...
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Timing Waveforms, continued Program Cycle Timing Diagram Address A15-0 DQ15-0 #CE #OE #WE Polling Timing Diagram #DATA Address A15-0 #WE #CE #OE DQ7/DQ15 Word Program Cycle 2AAA 5555 Address 5555 XX55 XXA0 XXAA T WPH T WP Word 0 Word ...
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Timing Waveforms, continued Toggle Bit Timing Diagram Address A15-0 #WE #CE #OE DQ6/DQ14 Boot Block Lockout Enable Timing Diagram Address A15-0 5555 DQ15-0 #CE #OE #WE T OEH Six-word code for Boot Block Lockout Feature ...
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Timing Waveforms, continued Chip Erase Timing Diagram Address A15-0 5555 DQ15-0 #CE #OE #WE Main Memory Erase Timing Diagram 5555 Address A15-0 DQ15-0 #CE #OE #WE SW0 Six-word code for 5V-only software chip erase 5555 5555 2AAA 2AAA XX55 XX80 ...
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... Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. HOW TO READ THE TOP MARKING Example: The top marking of 44-pin PLCC W49F102P-45 W49F102P-45 2138977A-A12 149OBSA ...
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... Notes: 1. Dimension D & not include interlead flash. 2. Dimension b1 does not include dambar protrusion/intrusion. 3. Controlling dimension: Inches 4. General appearance spec. should be based on final visual inspection spec. Dimension in Inches Dimension in mm Symbol Min. Nom. Max. ...
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... Publication Release Date: February 19, 2002 - 21 - W49F102 DESCRIPTION Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Revision A4 ...