ADSP-21266SKSTZ-1B Analog Devices Inc, ADSP-21266SKSTZ-1B Datasheet - Page 8

ADSP-21266SKSTZ-1B

Manufacturer Part Number
ADSP-21266SKSTZ-1B
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADSP-21266SKSTZ-1B

Device Core Size
32b
Architecture
Super Harvard
Format
Floating Point
Clock Freq (max)
150MHz
Mips
150
Device Input Clock Speed
150MHz
Ram Size
256KB
Program Memory Size
512KB
Operating Supply Voltage (typ)
1.2/3.3V
Operating Supply Voltage (min)
1.14/3.13V
Operating Supply Voltage (max)
1.26/3.47V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21266SKSTZ-1B
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADSP-21261/ADSP-21262/ADSP-21266
TARGET BOARD JTAG EMULATOR CONNECTOR
Analog Devices DSP Tools product line of JTAG emulators uses
the IEEE 1149.1 JTAG test access port of the ADSP-2126x pro-
cessor to monitor and control the target board processor during
emulation. Analog Devices DSP Tools product line of JTAG
emulators provides emulation at full processor speed, allowing
inspection and modification of memory, registers, and proces-
sor stacks. The processor’s JTAG interface ensures that the
emulator will not affect target system loading or timing.
For complete information on Analog Devices SHARC DSP
Tools product line of JTAG emulator operation, see the appro-
priate emulator hardware user’s guide.
DEVELOPMENT TOOLS
The ADSP-2126x is supported by a complete automotive refer-
ence design and development board as well as by a complete
home audio reference design board available from Analog
Devices. These boards implement complete audio decoding and
postprocessing algorithms that are factory programmed into the
ROM space of the ADSP-2126x. SIMD optimized libraries con-
sume less processing resources, which results in more available
processing power for custom proprietary features.
The nonvolatile memory of the ADSP-2126x can be configured
to contain a combination of Dolby
Dolby Digital Surround EX, Dolby Pro Logic II, Dolby Pro
Logic IIx, DTS-ES, DTS
S/PDIF and analog I/Os are provided to maximize end system
flexibility.
The ADSP-2126x is also supported with a complete set of
CROSSCORE
including Analog Devices emulators and VisualDSP++
development environment. The same emulator hardware that
supports other SHARC processors also fully emulates the
ADSP-2126x.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an alge-
braic syntax), an archiver (librarian/library builder), a linker, a
loader, a cycle-accurate instruction-level simulator, a C/C++
compiler, and a C/C++ runtime library that includes DSP and
mathematical functions. A key point for these tools is C/C++
code efficiency. The compiler has been developed for efficient
translation of C/C++ code to DSP assembly. The ADSP-2126x
SHARC DSP has architectural features that improve the
efficiency of compiled C/C++ code.
The VisualDSP++ debugger has a number of important fea-
tures. Data visualization is enhanced by a plotting package that
offers a significant level of flexibility. This graphical representa-
tion of user data enables the programmer to quickly determine
the performance of an algorithm. As algorithms grow in com-
plexity, this capability can have increasing significance on the
designer’s development schedule, increasing productivity. Sta-
CROSSCORE is a registered trademark of Analog Devices, Inc.
VisualDSP++ is a registered trademark of Analog Devices, Inc.
®†
software and hardware development tools,
®
96/24 5.1, and Neo:6
®
Digital, Dolby Pro Logic,
TM
. Multiple
Rev. F | Page 8 of 44 | July 2009
®‡
tistical profiling enables the programmer to nonintrusively poll
the processor as it is running the program. This feature, unique
to VisualDSP++, enables the software developer to passively
gather important code execution metrics without interrupting
the real-time characteristics of the program. Essentially, the
developer can identify bottlenecks in software quickly and effi-
ciently. By using the profiler, the programmer can focus on
those areas in the program that impact performance and take
corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can
The VisualDSP++ IDDE lets programmers define and manage
DSP software development. Its dialog boxes and property pages
let programmers configure and manage all of the SHARC devel-
opment tools, including the color syntax highlighting in the
VisualDSP++ editor. This capability permits programmers to
The VisualDSP++ Kernel (VDK) incorporates scheduling and
resource management tailored specifically to address the mem-
ory and timing constraints of DSP programming. These
capabilities enable engineers to develop code more effectively,
eliminating the need to start from the very beginning when
developing new application code. The VDK features include
threads, critical and unscheduled regions, semaphores, events,
and device flags. The VDK also supports priority-based, pre-
emptive, cooperative, and time-sliced scheduling approaches. In
addition, the VDK was designed to be scalable. If the application
does not use a specific feature, the support code for that feature
is excluded from the target system.
Because the VDK is a library, a developer can decide whether to
use it or not. The VDK is integrated into the VisualDSP++
development environment, but can also be used via standard
command line tools. When the VDK is used, the development
environment assists the developer with many error-prone tasks
and assists in managing system resources, automating the gen-
eration of various VDK-based objects, and visualizing the
system state when debugging an application that uses the VDK.
VisualDSP++ Component Software Engineering (VCSE) is
Analog Devices’ technology for creating, using, and reusing
software components (independent modules of substantial
functionality) to quickly and reliably assemble software applica-
• View mixed C/C++ and assembly code (interleaved source
• Insert breakpoints
• Set conditional breakpoints on registers, memory,
• Perform linear or statistical profiling of program execution
• Fill, dump, and graphically plot the contents of memory
• Perform source level debugging
• Create custom debugger windows
• Control how the development tools process inputs and
• Maintain a one-to-one correspondence with the tools’
and object information)
and stacks
generate outputs
command line switches

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