GS84118AT-100 GSI TECHNOLOGY, GS84118AT-100 Datasheet - Page 4

• Manufacturer Part Number: GS84118AT-100
• Manufacturer: GSI TECHNOLOGY

Specifications of GS84118AT-100

• Density: 4.5Mb
• Access Time (max): 12ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 66.7MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 140mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 18b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Rev: 1.02 4/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Pin Description
CE1,CE2, CE3
ADSP, ADSC
DQP1–DQP2
DQ1–DQ16
Symbol
MATCH
V
BWE
MOE
BW1
BW2
ADV
TMS
TDO
CLK
LBO
TCK
V
V
GW
TDI
OE
NC
DE
An
ZZ
FT
DDQ
DD
SS
Byte Write Enable Signal—The byte write enable signal needs to be combined with one of the four
Power down control—Application of ZZ will result in a low standby power consumption.
Data Enable—Data input registers are updated only when DE is active.
4/20
byte write signals for a write operation to occur.
Byte Write signal for data outputs 9 thru 16
Byte Write signal for data outputs 1 thru 8
2.5 V/3.3 V output power supply
Flow Through or Pipeline mode
Parity Input and Output pins
Data Input and Output pins
Linear Order Burst mode
Burst address advance
Address status signals
Address Input Signals
Match Output Enable
Global Write Enable
3.3 V power supply
Clock Input Signal
Test Mode Select
Description
Output Enable
Test Data Out
Chip Enables
Match Output
Test Data In
No Connect
Test Clock
Ground
GS84118AT/B-166/150/130/100
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