TP3403V National Semiconductor, TP3403V Datasheet

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TP3403V

Manufacturer Part Number
TP3403V
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of TP3403V

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
28
Lead Free Status / Rohs Status
Not Compliant
C 1995 National Semiconductor Corporation
TP3401 TP3402 TP3403
DASL Digital Adapter for Subscriber Loops
General Description
The TP3401 TP3402 and TP3403 are complete monolithic
transceivers for data transmission on twisted pair subscriber
loops They are built on National’s double poly microCMOS
process and require only a single
Mark Inversion (AMI) line coding in which binary ‘1’s are
alternately transmitted as a positive pulse then a negative
pulse is used to ensure low error rates in the presence of
noise with lower emi radiation than other codes such as Bi-
phase (Manchester)
Full-duplex transmission at 144 kb s is achieved on a single
twisted wire pair using a burst-mode technique (Time Com-
pression Multiplexed) Thus the device operates as an ISDN
‘U’ Interface for short loop applications typically in a PBX
environment providing transmission for 2 B channels and 1
D channel On
(6k ft)
System timing is based on a Master Slave configuration
with the line card end being the Master which controls loop
timing and synchronisation All timing sequences necessary
for loop activation and de-activation are generated on-chip
Selection of Master and Slave mode operation is pro-
grammed via the Microwire Control Interface
A 2 048 MHz clock which may be synchronized to the sys-
tem clock controls all transmission-related timing functions
For the TP3401 this clock must be provided from an exter-
nal source the TP3402 includes an oscillator circuit requir-
ing an external crystal The TP3403 includes the functions
of both the TP3401 and the TP3402
Block Diagram
Note 1 TP3401 only
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRE
TM
is a trademark of National Semiconductor Corporation
24 cable the range is at least 1 8 km
TL H 9264
a
5 Volt supply Alternate
Features
Complete ISDN PBX 2-Wire Data Transceiver including
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2 B plus D channel interface for PBX U Interface
144 kb s full-duplex on 1 twisted pair using Burst Mode
Loop range up to 6 kft ( 24AWG)
Alternate Mark Inversion coding with transmit filter and
scrambler for low emi radiation
Adaptive line equalizer
On-chip timing recovery no external components
Standard TDM interface for B channels
Separate interface for D channel
2 048 MHz master clock
Driver for line transformer
4 loop-back test modes
Single
MICROWIRE
Applications in
Available in both 20-pin DIP and 28-pin PLCC
PBX Line Cards
Terminals
Regenerators
a
5V supply
TM
compatible serial control interface
RRD-B30M115 Printed in U S A
December 1991
TL H 9264 – 1

Related parts for TP3403V

TP3403V Summary of contents

Page 1

... TP3402 includes an oscillator circuit requir- ing an external crystal The TP3403 includes the functions of both the TP3401 and the TP3402 Block Diagram Note 1 TP3401 only TRI-STATE is a registered trademark of National Semiconductor Corporation MICROWIRE trademark of National Semiconductor Corporation C 1995 National Semiconductor Corporation ...

Page 2

... BCLK In Slave mode this kHz clock output for D channel data Crystal specifications 2 048 MHz parallel resonant load Crystal tolerance should be x ture 2 TP3403 Package Information TL H 9264 – 16 Order Number TP3403V See NS Package Number V28A Description r FS must be synchronous r b and B ...

Page 3

Pin Descriptions (Continued) Name Description CI MICROWIRE control channel serial data in- put CO MICROWIRE control channel serial data out- put CCLK Clock input for the MICROWIRE control channel CS Chip Select input which enables the MICRO- WIRE control channel ...

Page 4

Functional Description (Continued) FIGURE 3 Typical AMI Waveform at L FIGURE 4 Typical AMI Transmit Spectrum Measured at LO Output (With RBW FIGURE 5 Burst Mode Timing on the Line 9264 – 4 100 Hz ...

Page 5

Functional Description (Continued) BURST MODE OPERATION For full-duplex operation over a single twisted-pair burst mode timing is used with the line-card (exchange) end of the link acting as the timing Master Each burst from the Master consists of the B1 ...

Page 6

TABLE II Control and Status Register Functions Bit State Control Register Function 0 Master Mode C7 1 Slave Mode 0 Deactivate and Power Down C6 1 Power Up and Activate 0 Normal Through Connection C5 1 Loopback to Digital Interface ...

Page 7

Timing Diagrams (Continued) FIGURE 7 B Channel Interface Timing Slave Mode Typical Applications FIGURE 8 Typical Application for Slave End Note 1 The TP3401 may also be used in this configuration with an external MCLK source Note 2 The TP3075 ...

Page 8

Typical Applications (Continued) FIGURE 9 Typical Application for Master End Timing Diagrams FIGURE 10 B Channel Interface Timing Details 9264 – 9264 – 7 ...

Page 9

Timing Diagrams (Continued) FIGURE 11 D Channel Interface Timing (Master and Slave Modes C1 FIGURE 12 D Channel Interface Timing (Master Mode only 9264 – 9264– ...

Page 10

Timing Diagrams (Continued) 10 ...

Page 11

... Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications V to GND CC Voltage Voltage at any Digital Input V CC Electrical Characteristics and correlation with 100% electrical testing are assured by correlation with other production tests and or product design and characterization Typical characteristics are ...

Page 12

Timing Characteristics Unless otherwise noted All signals are referenced to GND Symbol Parameter MASTER CLOCK INPUT SPECIFICATIONS F Master Clock Frequency MCK Master Clock Tolerance Master Clock Input Jitter t Clock Pulse ...

Page 13

Timing Characteristics (Continued) Unless otherwise noted All signals are referenced to GND Symbol Parameter D CHANNEL INTERFACE (Figure 11 12) t Set Up Time D SDDC X Valid to DCLK Low t ...

Page 14

Definitions and Timing Conventions DEFINITIONS the d c input level above which input level is guaranteed to appear as a logical one This parameter measured by performing a function- al test ...

Page 15

Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number TP3401J or TP3402J NS Package Number J20A 15 ...

Page 16

... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Plastic Chip Carrier (V) Order Number TP3403V NS Package Number V28A 2 A critical component is any component of a life ...

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