DT28F320S3110 Intel, DT28F320S3110 Datasheet - Page 14
DT28F320S3110
Manufacturer Part Number
DT28F320S3110
Description
Manufacturer
Intel
Datasheet
1.DT28F320S3110.pdf
(52 pages)
Specifications of DT28F320S3110
Density
32Mb
Access Time (max)
110ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
22/21Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SSOP
Program/erase Volt (typ)
2.7/3.3/5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
4M/2M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DT28F320S3110
Manufacturer:
INTEL
Quantity:
5
28F160S3, 28F320S3
NOTES:
1. Refer to Table 19. When V
2. X can be V
3. STS in level RY/BY# mode (default) is V
4. See Section 4.3 for read identifier code data.
5. See Section 4.2 for read query data.
6. Command writes involving block erase, write, or lock-bit configuration are reliably executed when V
7. Refer to Table 3 for valid D
8. DQ refers to DQ
9. High Z will be V
10. RP# at GND ± 0.2V ensures the lowest deep power-down current.
11. OE# = V
14
Read
Output Disable
Standby
Reset/Power-
Down Mode
Read Identifier
Codes
Read Query
Write
voltages.
configuration algorithms. It is V
program suspend mode, or deep power-down mode.
V
CC
Mode
= V
CC1/2
IL
and WE# = V
IL
or V
(see Section 6.2).
OH
0–7
IH
Notes
with an external pull-up resistor.
3,6,7
for control and address input pins and V
if BYTE# is low and DQ
1,2
10
4
5
IL
concurrently is an undefined state and should not be attempted.
PP
IN
RP#
V
V
V
V
V
V
during a write operation.
V
IH
IH
IH
IH
IH
IH
OH
IL
V
PPLK
when the WSM is not busy, in block erase suspend mode (with programming inactive),
CE
, memory contents can be read, but not altered.
V
V
V
V
V
V
V
V
X
IH
IH
IL
IL
IL
IL
IL
IL
OL
0
#
when the WSM is executing internal block erase, programming, or lock-bit
0–15
Table 2. Bus Operations
CE
if BYTE# is high.
V
V
V
V
V
V
V
V
X
IL
IL
IH
IL
IH
IL
IL
IL
1
# OE#
V
V
V
V
V
X
X
IH
IH
IL
IL
IL
PPLK
(11)
or V
WE#
V
V
V
V
V
X
X
PPH1/2
IH
IH
IH
IH
IL
(11)
ADVANCE INFORMATION
for V
See Table 6
Address
Figure 6
PP
See
X
X
X
X
X
. See Table 19, for V
V
PPH1/2
V
X
X
X
X
X
X
PP
PP
= V
PPLK
High Z
High Z
High Z High Z
DQ
D
D
D
D
PPH1/2
OUT
OUT
OUT
IN
and V
(8)
and
PPH1/2
High Z
High Z
STS
X
X
X
X
(3)
(9)
(9)
(9)