RC28F640J3A120 Intel, RC28F640J3A120 Datasheet - Page 4

• Manufacturer Part Number: RC28F640J3A120
• Manufacturer: Intel

Specifications of RC28F640J3A120

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 120ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 23/22Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: EZBGA
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 8M/4M
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

Contents
10.0 Read Operations.......................................................................................................................... 37
11.0 Programming Operations ........................................................................................................... 42
12.0 Erase Operations......................................................................................................................... 44
13.0 Security Modes ............................................................................................................................ 46
14.0 Special Modes.............................................................................................................................. 50
Appendix A Common Flash Interface.................................................................................................52
Appendix B Flow Charts ......................................................................................................................59
Appendix C Design Considerations ...................................................................................................68
Appendix D Additional Information ....................................................................................................70
Appendix E Ordering Information.......................................................................................................71
4
9.2
10.1
10.2
10.3
11.1
11.2
11.3
11.4
12.1
12.2
12.3
13.1
13.2
13.3
13.4
14.1
14.2
Device Commands ............................................................................................................. 35
Read Array.......................................................................................................................... 37
10.1.1 Asynchronous Page Mode Read ........................................................................... 37
10.1.2 Enhanced Configuration Register (ECR)............................................................... 38
Read Identifier Codes ......................................................................................................... 39
10.2.1 Read Status Register............................................................................................. 39
Read Query/CFI.................................................................................................................. 41
Byte/Word Program ............................................................................................................ 42
Write to Buffer..................................................................................................................... 42
Program Suspend............................................................................................................... 43
Program Resume................................................................................................................ 43
Block Erase......................................................................................................................... 44
Block Erase Suspend ......................................................................................................... 44
Erase Resume .................................................................................................................... 45
Set Block Lock-Bit............................................................................................................... 46
Clear Block Lock-Bits.......................................................................................................... 46
Protection Register Program .............................................................................................. 47
13.3.1 Reading the Protection Register............................................................................ 47
13.3.2 Programming the Protection Register.................................................................... 47
13.3.3 Locking the Protection Register............................................................................. 47
Array Protection .................................................................................................................. 49
Set Read Configuration Register Command ...................................................................... 50
Status (STS) ....................................................................................................................... 50
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