W83178S Winbond Electronics, W83178S Datasheet - Page 3

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W83178S

Manufacturer Part Number
W83178S
Description
Manufacturer
Winbond Electronics
Datasheet

Specifications of W83178S

Number Of Outputs
13
Operating Supply Voltage (max)
3.465V
Operating Temp Range
0C to 70C
Propagation Delay Time
4ns
Operating Supply Voltage (min)
3.135V
Mounting
Surface Mount
Pin Count
28
Operating Supply Voltage (typ)
3.3V
Package Type
SOP
Input Frequency
150MHz
Duty Cycle
55%
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant

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6. FUNCTIONAL DESCRIPTION
6.1 2-Wire I
The clock generator is a slave I2C component which can be read back the data stored in the latches
for verification. All proceeding bytes must be sent to change one of the control bytes. The 2-wire
control interface allows each clock output individually enabled or disabled. On power up, the
W83178S initializes with default register settings, and then it ’o ptional to use the 2-wire control
interface.
The SDATA signal only changes when the SDCLK signal is low, and is stable when SDCLK is high
during normal data transfer. There are only two exceptions. One is a high-to-low transition on SDATA
while SDCLK is high used to indicate the beginning of a data transfer cycle. The other is a low-to-
high transition on SDATA while SDCLK is high used to indicate the end of a data transfer cycle. Data
is always sent as complete 8-bit bytes followed by an acknowledge generated.
Byte writing starts with a start condition followed by 7-bit slave address and [1101 0010], command
code checking [0000 0000], and byte count checking. After successful reception of each byte, an
acknowledge (low) on the SDATA wire will be generated by the clock chip. Controller can start to
write to internal I2C registers after the string of data. The sequence order is as follows:
Bytes sequence order for I
Set R/W to 1 when read back the data sequence is as follows:
6.2 Serial Control Registers
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge. After
that,
acknowledged.
6.2.1 Register 0: (1 = Active, 0 = Inactive)
Clock Address
A(6:0) & R/W
Clock Address
A(6:0) & R/W
BIT
7
6
5
4
3
2
1
0
the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
@POWERUP
2
C Control Interface
1
1
1
1
1
1
-
-
Ack
Ack
2
C controller:
8 bits dummy
Command code
PIN
11
10
Byte 0
7
6
3
2
-
-
SDRAM5 (Active/Inactive)
SDRAM4 (Active/Inactive)
Reserved
Reserved
SDRAM3 (Active/Inactive)
SDRAM2 (Active/Inactive)
SDRAM1 (Active/Inactive)
SDRAM0 (Active/Inactive)
Ack
Ack
- 3 -
8 bits dummy
Byte count
Byte 1
DESCRIPTION
Preliminary W83178S
Publication Release Date: March 1999
Ack
Ack
Byte0,1,2...
until Stop
Byte2, 3, 4...
until Stop
Revision A1

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