AD6650BBC Analog Devices Inc, AD6650BBC Datasheet - Page 27

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AD6650BBC

Manufacturer Part Number
AD6650BBC
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD6650BBC

Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Operating Supply Voltage (typ)
3.3V
Lead Free Status / Rohs Status
Not Compliant

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Another option is to ac-couple a differential ECL/PECL signal
to the encode input pins as shown in Figure 37. A device that
offers excellent jitter performance is the MC100EL16 (or a
device from the same family) from Motorola.
DRIVING THE ANALOG INPUTS
As with most new high speed, high dynamic range devices, the
analog input to the AD6650 is differential. Differential inputs
allow much improvement in performance on-chip because signals
are processed through attenuation and gain stages. Most of the
improvement is a result of differential analog stages that have
high rejection of even-order harmonics. Differential inputs are
also beneficial at the PCB level. First, differential inputs have
high common-mode rejection of stray signals, such as ground
and power noise, and good rejection of common-mode signals,
such as local oscillator feedthrough.
The AD6650 analog input voltage range is offset from ground
by 1.3 V. The resistor network on the input properly biases the
followers for maximum linearity and range. Therefore, the
analog source driving the AD6650 should be ac-coupled to the
input pins. The input resistance for the AD6650 is 200 Ω, and
the input voltage range is 2 V p-p differential. This equates to
4 dBm full-scale input power. The recommended method for
driving the analog input of the AD6650 is to use an RF balun.
J101
PECL
ECL/
47000pF
Figure 38. Balun-Coupled Analog Input Circuit
C101
Figure 37. Differential ECL for Encode
T101
T102
5
4
5
4
VT
VT
1
3
1
3
0.1µF
0.1µF
47000pF
47000pF
C102
C103
CLK
CLK
AD6650
R101
68.9Ω
AIN/BIN
AIN/BIN
Rev. A | Page 27 of 44
EXTERNAL REFERENCE
The reference should be connected as shown in Figure 39 to
achieve the results specified in this data sheet.
POWER SUPPLIES
Care should be taken when selecting a power source. Linear
supplies are strongly recommended. Switching supplies tend to
have radiated components that may be received by the AD6650.
Each of the power supply pins should be decoupled as closely to
the package as possible using 0.1 μF chip capacitors.
The AD6650 is susceptible to low frequency power supply
interference as shown in Figure 40. This low frequency energy is
translated into spurious tones in the output signal. Analog
power supply ripple couples into the LO through the VCO. This
can be observed from the ripple frequency vs. sideband spur
level plot (see Figure 40). Note that this plot has the spur level
referenced to 1 mV rms supply ripple and is referred to the LO.
Thus, this plot shows a transfer function rather than an absolute
value. The spurious level can be extrapolated to any supply
ripple level from this data using Equation 22.
where:
Spur_Lev is the output spurious level relative to the LO.
Spur_Lev
Figure 41.
SupRipple (mV) is the RMS ripple on the AVDD power supply.
0.1µF
Spur
AIN/BIN
AIN/BIN
REFGND
10µF
1 mV
VREF
_
Lev
is the 1 mV referred level from Figure 40 and
=
R
R
Spur
INT
INT
Figure 39. Reference Connection
SELECT
LOGIC
_
Lev
REF
AMP
1
mV
VREF
×
20
log(
CHANNEL A/
CHANNEL B
CORE
ADC
SupRipple
0.5V
REFT
REFB
(
mV
0.1µF
AD6650
0.1µF
))
0.1µF
(22)
10µF

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