UPC8191KE1A CALIFORNIA EASTERN LABS, UPC8191KE1A Datasheet - Page 3

no-image

UPC8191KE1A

Manufacturer Part Number
UPC8191KE1A
Description
Manufacturer
CALIFORNIA EASTERN LABS
Datasheet

Specifications of UPC8191KE1A

Lead Free Status / Rohs Status
Compliant
PIN FUNCTIONS
No.
Pin
1
2
3
4
5
6
7
8
9
(Shifter)
(Shifter)
Name
GND
Tank
VCC
VPS
LOb
Pin
Qb
LO
Q
2.7 to 3.3
Applied
Voltage
0 to 3.0
VCC/2
VCC/2
(V)
0
0
0
0
(Pin Voltage is measured at V
Voltage
2.65
2.02
2.02
Pin
(V)
-
-
-
-
-
Q signal input pin.
Apply bias voltage externally.
Maximum balance input voltage is
1 000 mVP-P (balance).
Ground pin of I/Q modulator.
This pin should be grounded with
minimum inductance.
Form the ground pattern as widely as
possible to minimize ground impedance.
External inductor and capacitor can
supress harmonics spurious of LO frequency.
LC value should be determined
according to LO input frequency
and suppression level.
Bypass pin of local signal input for I/Q
modulator.
In the case of single local input,
this pin must be decoupled with capacitor
ex. 1 000 pF.
Local signal input of I/Q modulator.
The DC cut capacitor ex. 1 000 pF
must be attaced to this pin.
Supply voltage pin of I/Q modulator.
Power saving pin of I/Q modulator +
AGC amplifier.
This pin modulator can control
Active/Sleep state with bias as follows.
VPS (V)
0 to 0.5
2.2 to 3
Functions and Applications
CC
= 2.85 V)
Active Mode
Sleep Mode
State
1
Internal Equivalent Circuits
9
4
–––––
50 kΩ
5
External
2

Related parts for UPC8191KE1A