ST70137 STMicroelectronics, ST70137 Datasheet
ST70137
Specifications of ST70137
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ST70137 Summary of contents
Page 1
... Front End). ST70137 provides PCI and USB interface. PCI is used to build ADSL CPE modem bundled in the PC, USB interface is used to build external bus powered ADSL modem. ST70137 is compliant with ITU 992.1 Annexe A USB (USB and B, with ITU 992.2 and with ANSI T1.413. ...
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... Utop FSM: Utopia Finite State Machine ST70136 AFE LINE or ST70134 I/F ST70137 ADSL MODEM POTS Line USB or PCI_IF PCI_BRIDGE Bridge SWITCHER OBC FIFOs REGs PERIPHERAL OBC_IF TOSCA v. 2.0 ST70137 POTS Line ST70136 or ST70134 PCI Board MEM IF CFG_SEL CFG_MEMs CLK TGB RST GPIO IF TAP AFE IF 2/22 ...
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... ST70137 SOFTWARE ARCHITECTURE Netscape, NetMeeting, etc. Win32 kernel Modem SW USB Driver USBD SYS - MS Bus Driver UHCD.SYS OHCD.SYS UHCI (Intel) OHCI (NEC and Others) USB Device 3/22 Trace Tools User Applications: NDIS 5 Data Control Hw Abstraction Layer PCI Driver Registry PCI Device Ring 3: ...
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... PCI_AD[28] 33 VSS 34 PCI_AD[27] 35 PCI_AD[26 134 133 132 131 130 129 128 127 126 125124 123 122 121120 119 118 117116 115 114 113 112 111 110 109 ST70137 ST70137 108 VDD3.3 107 ACTD 106 PWDN 105 SUSPENDN 104 SUSPEND 103 LD_PWDN ...
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... ST70137 PIN LIST PIN NAME TYPE 1 VDD3 GPIO[0] I/O 3 GPIO[1] I/O 4 GPIO[2] I/O 5 GPIO[3] I/O 6 VSS P 7 DATA_MINUS I/O 8 DATA_PLUS I/O 9 VSS P 10 RSTN I 11 CFG_SCE O 12 CFG_SCK/GPO CFG_SDI I 14 CFG_SDO/GPO VDD 1 C_EXT P 17 VSS 18 VDD3 VR50F P 20 PCI_INTAN OD 21 PCI_RSTN ...
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... Power supply pins 1.8V for Core 8mA 8mA Ground 8mA 8mA Power supply pins 3.3V for PCI I/O pads ESD Protection 8mA 8mA Ground 8mA 8mA Power supply pins 3.3V for PCI I/O pads ESD Protection 8mA 8mA Ground 8mA 8mA ST70137 6/22 ...
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... ST70137 PIN LIST (continued) PIN NAME TYPE 74 VDD3 PCI_AD[13] I/O 76 PCI_AD[12] I/O 77 VSS P 78 PCI_AD[11] I/O 79 PCI_AD[10] I/O 80 VDD3 PCI_AD[9] I/O 82 PCI_AD[8] I/O 83 VSS P 84 PCI_CBE_N[0] I/O 85 PCI_AD[7] I/O 86 VDD3 PCI_AD[6] I/O 88 PCI_AD[5] I/O 89 VSS P 90 PCI_AD[4] I/O 91 PCI_AD[3] I/O 92 VDD3.3 ...
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... Power supply pins 3.3V for I/O pads (not PCI) 4mA 4mA 4mA Ground Test Reserved - Must be fixed to ground Power supply pins 1.8V for Core 4mA Ground PLL Analog power supply 1.8V PLL Analog Ground PLL digital power supply 1.8V PLL digital Ground ST70137 8/22 ...
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... PCI Clock. (33 MHz) The rising edge of this signal is the reference upon which all the other PCI signals are based except for PCI_RSTN and PCI_INTAN. The maximum PCI_CLK frequency for ST70137 is 33MHz and the minimum is DC. L PCI Reset Reset bring ST70137 in a known state: ...
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... PCI Initiator Ready This signal is always driven by the bus master to indicate its ability to complete the current data phase. During write transactions it indicates PCI_AD[] contains valid data. H PCI Initializatio n Device Select This pin is used as chip select during configuration read or write transactions. ST70137 asserted. 10/22 ...
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... ST70137 PIN DESCRIPTION (continued) Signal Name Direction Init Status PCI_TRDYN I/O I PCI_PERRN I/O I PCI_SERRN O Z PCI_INTAN O Z PCI_PMEN O Z PCI_STOPN I/O I USB INTERFACE DPLUS I/O I DMINUS I/O I MISCELLANEOUS INTERFACE GPIO[3:0] I/O I CFG_MEM_SEL I I USB_PCIN_sel I I VAUX_D / USB_SP I I 11/22 Polarity Signal Description ...
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... ACTD asserts the PCI_PMEN signal (if this last has been enabled) and generates an interrupt event. When USB IF has been selected, the Low to High transi- tion of ACTD de-asserts the SUSPEND signal and re-enable the internal ST70137 activity. H Suspend Mode Indication. L Suspend Mode Indication Negated. ...
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... ST70137 PIN DESCRIPTION (continued) Signal Name Direction Init Status CFG_MEM INTERFACE CFG_SCE O L CFG_SCK/GPO CFG_SDI I I CFG_SDO/GPO JTAG INTERFACE TDI I IH TDO O - TMS I IH TCK I IL TRSTB I IL TEST CONDITION All Ouputs have been loaded with. Outputs Minimum PCI USB * Others * See text scheme at page 20 ...
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... Data Valid Time T s2 Data Setup Time T h2 Data Hold Time T v2 Data Valid Time T s3 Data Setup Time T h3 Data Hold Time Tv3 Data Valid Time Minimum Typical 35.328 28 Th1 Ts1 Tv1 Ts2 Tv2 Tv3 Th3 ST70137 Maximum Unit MHz Th2 14/22 ...
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... ST70137 CFG_MEM IF Signals with PCI = 30.3ns CFG_SCK CFG_SDO Th CFG_SDI Ts CFG_SCE CFG_MEM IF signals with PCI = 30.3ns * Symbol Parameter Ts Data Setup Time Th Data Hold Time Tv1 Data Valid Time Tv2 Data Valid Time Tsck SCK Clock period: - USB 48MHz - PCI 33MHz * PCI conditions are more restrictive than USB conditions. ...
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... Driver Output Resistance (steady state drive Guaranted by design. Minimum Typical 3.0 3.3 1.62 1.8 0 -65 2000 Condition Minimum Typical -0.5 0.5V DD 0<Vin<V -10 DD Iout = 1.5mA Iout = 0.5mA 0. N/A Minimum Typical 0.2 0.8 0.8 to GND 2.8 to 3.6V) 28 ST70137 Maximum Units 3.6 V 1.98 V 450 +150 V Maximum Units ...
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... ST70137 Other Signals DC Characteristics The values presented in the following table apply for all inputs and/or outputs unless otherwise specified. All voltages are referenced unless otherwise specified, positive current is towards the device. SS Symbol Parameter I Input Leakage Current Vin = Tristate Leakage Current Vin = V ...
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... PCI REQN and GNTN are point-to-point signals and have different output valid delay and input setupt times than do bused signals. REQN has set up of 12ns and GNTN of 10ns. All other signals are bused. ** Guaranted by design. 2.4V 0. 0. Minimum 10 100 ST70137 Typical Maximum Units 18/22 ...
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... ST70137 CLK Input Output Tri-state Output USB Interface AC Specifications (1.1 version) AC Characteristics (D+, D-) Symbol Parameter 0.05%) t Average bit rate (12 M Rise Time between 10% and 90% (see R Figure Rise and Fall Time Measures) t Fall Time 10% and 90% (see Figure Rise F and Fall Time Measures) ...
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... The available values are 2, 4 and 8mA 90% 90% 10% Test Condition Minimum 2.0 Slow edge < 1V/ s 0.9 Slow edge < 1V/ s 1.3 Slow edge < 0 XmA (see Note) OUT I = XmA (see Note) 2.4 OUT ST70137 Typical Maximum Units 0 1.35 V 1.9 V 0 20/22 ...
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... ST70137 PACKAGE MECHANICAL DATA (TQFP144 - 1.40 mm) 144 Millimeters Dimension Minimum Typical A A1 0.05 A2 1.35 B 0.17 C 0.09 D 22.00 D1 20.00 D3 17. 22.00 E1 20.00 E3 17. 21/22 e 109 108 Maximum Minimum 1.60 0.15 0.002 1.40 1.45 0.053 0.22 0.27 0.0067 0.20 0.0035 0.50 0.60 ...
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... ST70137 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice ...