MICRF505BML TR Micrel Inc, MICRF505BML TR Datasheet - Page 23

MICRF505BML TR

Manufacturer Part Number
MICRF505BML TR
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of MICRF505BML TR

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK
Lead Free Status / Rohs Status
Not Compliant
Bit Synchronizer
A bit synchronizer can be enabled in receive mode
by selecting the synchronous mode (Sync_en=1).
The DataClk pin will output a clock with twice the
frequency of the bit rate (a bit rate of 20 kbit/sec
gives a DataClk of 20 kHz). A received symbol/bit on
DataIXO will be output on rising edge of DataClk.
The micro controller should therefore sample the
symbol/bit on falling edge of DataClk.
The bit synchronizer uses a clock which needs to be
programmed according to the bit rate. The clock
frequency should be 16 times the actual bit rate (a
bit rate of 20 kbit/sec needs a bit synchronizer clock
with frequency of 320 kHz). The clock frequency is
set by the following formula:
f
0000110
0000111
BITSYNC
October 2006
A6..A0
_
BitRate_clkS1
CLK
D7
-
=
Re
fclk
BitRate_clkS0
ModclkS2
_
K
D6
×
2
f
XCO
7 (
BITSYNC
RefClk_K5
ModclkS1
D5
_
clkS
)
RefClk_K4
ModclkS0
D4
23
BitSync_clkS2
RefClk_K3
where
Refclk_K is also used to derive the modulator clock
and the bit rate clock.
At the beginning of a received data package, the bit
synchronizer clock frequency is not synchronized to
the bit rate. When these two are maximum offset to
each
synchronization is achieved.
D3
f
frequency (16 times higher than the bit rate)
f
Refclk_K: 6 bit divider, values between 1 and
63
BitSync_clkS: Bit synchronizer setting, values
between 0 and 7
BITSYNC_CLK
XCO
other,
: Crystal oscillator frequency
BitSync_clkS1
RefClk_K2
it
D2
:
takes
The
bit
BitSync_clkS0
22
RefClk_K1
D1
synchronizer
bit/symbols
+1 408-944-0800
M9999-103106
BitRate_clkS2
RefClk_K0
D0
before
clock

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