TDA7540B STMicroelectronics, TDA7540B Datasheet - Page 36

• Manufacturer Part Number: TDA7540B
• Manufacturer: STMicroelectronics

Specifications of TDA7540B

• Case: TQFP
• Dc: 06+
• Lead Free Status / Rohs Status: Compliant

DOCUMENT CD00108485
Copyright STMicroelectronics
Functional description
4.4
4.4.1
32/75
REVISION 1.0
PLL and if counter section
PLL frequency synthesizer block
This part contains a frequency synthesizer and a loop filter for the radio tuning system. Only
one VCO is required to build a complete PLL system for FM world tuning and AM
upconversion (see
available.
The PLL counter works in a two stages configuration. The first stage is a swallow counter
with a two modulus (32/33) precounter. The second stage is an 11-bit programmable
counter.
The circuit receives the scaling factors for the programmable counters and the values of the
reference frequencies via an I
adjustable internal (XTAL) oscillator followed by the reference divider. The main reference
and step-frequencies are free selectable (RC, PC).
Output signals of the phase detector are switching the programmable current sources. The
loop filter integrates their currents to a DC voltage.
The values of the current sources are programmable by 6 bits also received via the I
(A, B, CURRH, LPF).
To minimize the noise induced by the digital part of the system, a special guard
configuration is implemented.
The loop gain can be set for different conditions by setting the current values of the
chargepump generator.
Frequency generation for phase comparison
The RF signals applies a two modulus counter (32/33) pre-scaler, which is controlled by a 5-
bit A-divider. The 5-bit register (PC0 to PC4) controls this divider. In parallel the output of the
prescaler connects to an 11-bit B-divider. The 11-bit PC register (PC5 to PC15) controls this
divider
Dividing range behind VCO divider:
f
f
Important: For correct operation: A
Three state phase comparator
The phase comparator generates a phase error signal according to phase difference
between f
Charge pump current generator
This system generators signed pulses of current. The phase error signal decides the
duration and polarity of those pulses. The current absolute values are programmable by A
register for high current and B register for low current.
VCOdiv
VCOdiv
= [33 x A + (B + 1 - A) x 32] x f
= (32 x B + A + 32) x f
SYN
and f
Figure
REF
. This phase error signal drives the charge pump current generator.
9). For auto search stop operation an IF counter system is
REF
2
C-Bus interface.The reference frequency is generated by an
COMPANY INTERNAL
≤
ACTIVE
32; B
REF
≥
A
Unauthorized reproduction and communication strictly prohibited
DATE 11-May-2006
TDA7540B
2
C Bus
page: 32/75