CS5522-AS Cirrus Logic Inc, CS5522-AS Datasheet - Page 2

ADC (A/D Converters) 2-Ch 24-Bit Delta Sigma ADC

CS5522-AS

Manufacturer Part Number
CS5522-AS
Description
ADC (A/D Converters) 2-Ch 24-Bit Delta Sigma ADC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5522-AS

Architecture
Delta-Sigma
Conversion Rate
0.617 KSPs
Input Type
Voltage
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
No

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CS
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TABLE OF CONTENTS
2
1. GENERAL DESCRIPTION ..................................................................................................... 13
ANALOG CHARACTERISTICS ................................................................................................ 5
TYPICAL RMS NOISE, CS5521/23.......................................................................................... 7
TYPICAL NOISE FREE RESOLUTION (BITS), CS5521/23 .................................................... 7
TYPICAL RMS NOISE, CS5522/24/28..................................................................................... 8
TYPICAL NOISE FREE RESOLUTION (BITS), CS5522/24/28 ............................................... 8
5 V DIGITAL CHARACTERISTICS........................................................................................... 9
3 V DIGITAL CHARACTERISTICS........................................................................................... 9
DYNAMIC CHARACTERISTICS ............................................................................................ 10
RECOMMENDED OPERATING CONDITIONS ..................................................................... 10
ABSOLUTE MAXIMUM RATINGS ......................................................................................... 10
SWITCHING CHARACTERISTICS ........................................................................................ 11
1.1 Analog Input ..................................................................................................................... 13
1.2 Overview of ADC Register Structure and Operating Modes ............................................ 16
1.3 Calibration ........................................................................................................................ 31
1.4 Performing Conversions and Reading the Data Conversion FIFO .................................. 34
1.1.1 Instrumentation Amplifier ......................................................................................... 14
1.1.2 Coarse/Fine Charge Buffers ............................................................................... 14
1.1.3 Analog Input Span Considerations .......................................................................... 15
1.1.4 Measuring Voltages Higher than 5 V .................................................................. 15
1.1.5 Voltage Reference .............................................................................................. 16
1.2.1 System Initialization ............................................................................................ 18
1.2.2 Command Register Quick Reference
1.2.3 Command Register Descriptions ........................................................................ 20
1.2.4 Serial Port Interface ............................................................................................ 25
1.2.5 Reading/Writing the Offset, Gain, and Configuration Registers .......................... 26
1.2.6 Reading/Writing the Channel-Setup Registers ................................................... 26
1.2.7 Configuration Register ........................................................................................ 28
1.3.1 Self Calibration .................................................................................................... 31
1.3.2 System Calibration .............................................................................................. 32
1.3.3 Calibration Tips ................................................................................................... 34
1.3.4 Limitations in Calibration Range ......................................................................... 34
1.4.1 Conversion Protocol ............................................................................................ 35
1.4.2 Calibration Protocol ............................................................................................. 38
1.2.6.1 Latch Outputs ...................................................................................... 28
1.2.6.2 Channel Select Bits ............................................................................. 28
1.2.6.3 Output Word Rate Selection ............................................................... 28
1.2.6.4 Gain Bits .............................................................................................. 28
1.2.6.5 Unipolar/Bipolar Bit ............................................................................. 28
1.2.7.1 Chop Frequency Select ....................................................................... 28
1.2.7.2 Conversion/Calibration Control Bits .................................................... 28
1.2.7.3 Power Consumption Control Bits ........................................................ 28
1.2.7.4 Charge Pump Disable ......................................................................... 29
1.2.7.5 Reset System Control Bits .................................................................. 29
1.2.7.6 Data Conversion Error Flags ............................................................... 29
1.4.1.1 Single, One-Setup Conversion ............................................................ 35
1.4.1.2 Repeated One-Setup Conversions without Wait ................................. 35
1.4.1.3 Repeated One-Setup Conversions with Wait ...................................... 36
1.4.1.4 Single, Multiple-Setup Conversions .................................................... 36
1.4.1.5 Repeated Multiple-Setup Conversions without Wait ........................... 37
1.4.1.6 Repeated Multiple-Setup Conversions with Wait ................................ 37
............................................................... 19
CS5521/22/23/24/28
DS317F8

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