A29010-70F AMIC, A29010-70F Datasheet

58T1319

A29010-70F

Manufacturer Part Number
A29010-70F
Description
58T1319
Manufacturer
AMIC
Datasheet

Specifications of A29010-70F

Memory Type
Flash - NOR
Memory Size
1Mbit
Memory Configuration
128K X 8
Interface Type
Parallel
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
32
Rohs Compliant
Yes
Document Title
Revision History
(November, 2010, Version 1.4)
Rev. No.
128K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory
0.0
0.1
0.2
0.3
1.0
1.1
1.2
1.3
1.4
History
Initial issue
Change I
Change typical byte programming time from 7μs to 35μs
Erase VCC supply voltage for ± 5% devices in Operation Ranges
Add the time limit t
Correct the Continuation ID command to hexadecimal
Final version release
Add Pb-Free package type
Add industrial product (-U) that operating temperature during
-40
Add A29010L-70UF and -55UF and to delete all leaded device from the
Page 1: Change from typical 100,000 cycles to minimum 100,000 cycles
ordering sheet
°C
to +85
LIT
from 50μA to 100μA
°C
for TSOP type
WPH
max. = 50μs of command cycle sequence
128K X 8 Bit CMOS 5.0 Volt-only,
Uniform Sector Flash Memory
Issue Date
December 8, 2000
January 3, 2001
February 6, 2001
August 21, 2001
October 7, 2003
August 9, 2004
December 2, 2004
July 13, 2010
November 25, 2010
AMIC Technology, Corp.
A29010 Series
Preliminary
Remark
Final

Related parts for A29010-70F

A29010-70F Summary of contents

Page 1

... TSOP type 1.3 Add A29010L-70UF and -55UF and to delete all leaded device from the ordering sheet 1.4 Page 1: Change from typical 100,000 cycles to minimum 100,000 cycles (November, 2010, Version 1.4) max. = 50μs of command cycle sequence A29010 Series 128K X 8 Bit CMOS 5 ...

Page 2

... The 8 bits of data appear on I/O addresses are input A16. The A29010 is offered in 32- pin PLCC, TSOP, and PDIP packages. This device is designed to be programmed in-system with the standard system 5.0 volt VCC supply ...

Page 3

... TSOP (Forward type) A11 A13 4 A14 VCC A16 10 A15 11 A12 (November, 2010, Version 1.4) PLCC VCC A14 29 A7 A13 A11 A10 I I I/O 3 A29010V 2 A29010 Series 5 A14 29 6 A13 A29010L A11 A10 I AMIC Technology, Corp A10 VSS ...

Page 4

... Description A0 - A16 Address Inputs - I/O Data Inputs/Outputs 0 7 Chip Enable CE Write Enable WE Output Enable OE VSS Ground VCC Power Supply 3 Chip Enable Output Enable STB Logic Y-Decoder STB X-decoder AMIC Technology, Corp. A29010 Series I Input/Output Buffers Data Latch Y-Gating Cell Matrix ...

Page 5

... The state machine outputs dictate the function of the device. The appropriate device bus operations table lists the inputs and control levels required, and the resulting output. The following subsections describe each of these operations in further detail. Table 1. A29010 Device Bus Operations ...

Page 6

... When the disabled. The output pins are placed in the high impedance state. . Standard read cycle 0 Table 2. A29010 Block Sector Address Table Sector Size (Kbytes Command Sequence" in the Characteristics table represents the active current . Standard read cycle timings and I ± ...

Page 7

... When using programming equipment, the autoselect mode requires V (11. address pinA9. Address pins ID A6, A1, and A0 must be as shown in Autoselect Codes (High Voltage Method) table. In addition, when verifying sector Table 3. A29010 Autoselect Codes (High Voltage Method) Description A16 - A15 A14 - A10 Manufacturer ID: AMIC X Device ID: A29010 ...

Page 8

... Definitions table shows the address and data requirements for the byte program command sequence. When the Embedded Program algorithm is complete, the device then returns to reading array data and addresses are 7 A29010 Series goes high, or while in the 5 on address bit A9. ID AMIC Technology, Corp. ...

Page 9

... Figure 2 illustrates the algorithm for the erase operation. Refer to the Erase/Program Operations tables in the "AC Characteristics" section for parameters, and to the Sector Erase Operations Timing diagram for timing waveforms. 8 A29010 Series . Any command other than Sector Erase or Erase 3 and any additional ...

Page 10

... I and I/O together Note : 1. See the appropriate Command Definitions table for erase command sequences. 2. See "I/O 9 A29010 Series START Write Erase Command Sequence Data Poll from System No Data = FFh ? Yes Erasure Completed : Sector Erase Timer" for more information. 3 Figure 2. Erase Operation AMIC Technology, Corp ...

Page 11

... The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. 10. The Erase Resume command is valid only during the Erase Suspend mode. 11. The time between each command cycle has to be less than 50μs (November, 2010, Version 1.4) Table 4. A29010 Command Definitions Bus Cycles (Notes First Second ...

Page 12

... Write Operation Status Several bits, I/O , I/O , I/O , I/O , and I A29010 to determine the status of a write operation. Table 5 and the following subsections describe the functions of these status bits. I/O , I/O and I/O each offer a method for determining whether a program or erase operation is complete or in progress ...

Page 13

... I/O vs. 2 internally controlled erase cycle has begun; all further and I commands (other than Erase Suspend) are ignored until the erase operation is complete. If I/O 12 A29010 Series , I I/O at least twice in a row to determine whether a toggle I/O on the following read cycle. 7 ...

Page 14

... Commplete, Write Reset Command Notes : 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as I/O changes to "1". See text. Figure 4. Toggle Bit Algorithm 13 A29010 Series -I/O 0 -I/O 0 (Note 1) No Yes Yes - I/O ...

Page 15

... Version 1.4) Table 5. Write Operation Status I/O I/O 7 (Note 1) Toggle I Toggle 1 No toggle Data Data Toggle I/O 7 20ns -2.0V 20ns 20ns VCC+2.0V 20ns 14 A29010 Series I/O I (Note N/A Data Data 0 N/A 20ns 20ns AMIC Technology, Corp. I/O 2 (Note 1) No toggle Toggle ...

Page 16

... VSS to VCC, VCC = VCC Max OUT VCC ± 0 VCC = 5. 12.0 mA, VCC = VCC Min -2.5 mA, VCC = VCC Min OH = -100 μA. VCC = VCC Min A29010 Series Min. Typ. Max. Unit ±1.0 μA μA 100 ±1.0 μ 0.4 1.0 mA -0.5 0.8 V 2.0 VCC+0.5 V 10.5 12.5 V 0.45 V 2.4 V Min ...

Page 17

... Timing Waveforms for Read Only Operation Addresses Output 0V (November, 2010, Version 1.4) Test Setup Max Max Read Toggle and Data Polling Max Addresses Stable t ACC OEH t CE High-Z 16 A29010 Series Speed -55 -70 Min Max Min Min Min Output Valid AMIC Technology, Corp. Unit - ...

Page 18

... VCC Set Up Time (Note 1) Notes: 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more information. (November, 2010, Version 1.4) Description Min. Min. Min. Min. Min. Min. Min. low) Min. Min. Min. Min. Max. Typ. Typ. Min. 17 A29010 Series Speed -55 -70 - ...

Page 19

... Program Command Sequence (last two cycles Addresses 555h CE t GHWL Data t VCS VCC Note : PA = program addrss program data, Dout is the true data at the program address. (November, 2010, Version 1. WPH A0h PD 18 A29010 Series Read Status Data (last two cycles WHWH1 Status D OUT AMIC Technology, Corp. ...

Page 20

... Addresses 2AAh CE t GHWL Data t VCS VCC Note : SA = Sector Address Valid Address for reading status data. (November, 2010, Version 1. 555h for chip erase WPH 55h 30h 10h for chip erase 19 A29010 Series Read Status Data WHWH2 In Complete Progress AMIC Technology, Corp. ...

Page 21

... Valid Status Valid Status (first read) (second read) . Illustration shows first two status cycle after command sequence, last status read 6 20 A29010 Series VA High-Z True Valid Data High-Z True Valid Data VA VA Valid Status Valid Status (stop togging) AMIC Technology, Corp. ...

Page 22

... Erase Erase Suspend Suspend Read Program toggle with OE and CE and I/O 6 Description Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Typ. Typ. 21 A29010 Series Erase Resume Erase Erase Suspend Read Complete in the section "Write Operation Statue" for 2 Speed -55 -70 - ...

Page 23

... DH PD for program 30 for sector erase 10 for chip erase Typ. (Note 1) Max. (Note 300 3.6 10.8 for further information A29010 Series Data Polling PA t WHWH1 I/O 7 OUT = Complement of Data Input OUT Unit Comments sec Excludes 00h programming prior to erasure (Note 4) sec μ ...

Page 24

... OUT C Control Pin Capacitance IN2 Notes: 3. Sampled, not 100% tested. 4. Test conditions T = 25° 1.0MHz A Data Retention Parameter Minimum Pattern Data Retention Time (November, 2010, Version 1.4) Description Test Conditions 23 A29010 Series Min. -1.0V -100 mA -1.0V Test Setup Typ 8.5 OUT ...

Page 25

... Output timing measurement reference levels Test Setup Device Under Test (November, 2010, Version 1.4) - 0.0 - 3.0 1.5 1.5 5 6.2 KΩ A29010 Series All others 1 TTL gate 100 20 0.45 - 2.4 0.8, 2.0 0.8, 2.0 2.7 KΩ Diodes = IN3064 or Equivalent AMIC Technology, Corp. Unit ...

Page 26

... Ordering Information Part No. Access Time (ns) A29010-55F A29010L-55UF 55 A29010L-55F A29010V-55UF A29010V-55F A29010-70F A29010L-70UF 70 A29010L-70F A29010V-70UF A29010V-70F A29010-90F A29010L-90UF 90 A29010L-90F A29010V-90UF A29010V-90F Note for industrial operating temperature range. (November, 2010, Version 1.4) Active Read Program/Erase Current Current Typ. (mA) Typ. (mA A29010 Series Standby Current Package Typ. (μ ...

Page 27

... D 1.645 1.650 1.655 E 0.537 0.542 0.547 E 0.590 0.600 0.610 1 E 0.630 0.650 0.670 0.100 - L 0.120 0.130 0.140 θ - 0° 15° 26 A29010 Series unit: inches/ θ Dimensions in mm Min Nom Max - - 5.334 0.381 - - 3.785 3.912 4.039 - 0.457 - - 1.270 - - 0.254 - 41.783 41.91 42.037 13 ...

Page 28

... D H 0.485 0.490 0.495 E L 0.075 0.090 0.095 0.003 θ - 0° 10° & G are for PC Board surface mount pad pitch D E design reference only. 27 A29010 Series unit: inches/ θ Dimensions in mm Min Nom Max - - 3.40 0. 2.67 2.80 2.93 0.66 0.71 0.81 ...

Page 29

... BSC H 0.779 0.787 0.795 D L 0.016 0.020 0.024 L - 0.032 - 0.020 0.003 θ - 0° 5° 28 A29010 Series unit: inches/ Detail "A" Dimensions in mm Min Nom Max - - 1.20 0.05 - 0.15 0.95 1.00 1.05 0.18 0.22 0.27 0.11 - 0.20 18.30 18.40 18. ...

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