TDA9110 STMicroelectronics, TDA9110 Datasheet - Page 23

• Manufacturer Part Number: TDA9110
• Description: Deflection Processor 32-Pin SPDIP
• Manufacturer: STMicroelectronics

Specifications of TDA9110

• Package: 32SPDIP
• Operating Temperature: 0 to 70 °C

OPERATING DESCRIPTION (continued)
Typical maximum and minimum frequency, at 25
and without any correction (S correction or C cor-
rection), can be calculated by :
If S or C corrections are applied, these values are
slighty affected.
If a synchronization pulse is applied, the internal
oscillator is automaticaly caught but the amplitude
is no more constant. An internal correction is acti-
vated to adjust it in less than a half a second : the
highest voltage of the ramp Pin 22 is sampled on
the sampling capacitor connected on Pin 20 at
each clock pulse and a transconductanceamplifier
generates the charge current of the capacitor. The
ramp amplitude becomes again constant.
The read status register enables to have the verti-
cal Lock-Unlock and the vertical Synchro Polarity
informations.
We recommand to use a AGC capacitor with low
leakage current. A value lower than 100nA is man-
datory.
A good stability of the internal closed loop is
reached by a 470nF
Pin 20 (VAGC).
III.6 - I
Then, S and C correction shapes can be added to
this ramp. These frequence independent S and C
corrections are generated internally. Their ampli-
tudes are adjustable by their respective I
ter. They can also be inhibited by their Select bit.
Finally, the amplitude of this S and C corrected
ramp can be adjusted by the vertical ramp ampli-
tude control register.
2
f
C Control Adjustments
(Max.)
= 2.5 x f
0
and f
5% capacitor value on
(Min.)
= 0.33 x f
2
0
C regis-
o
C
The adjusted ramp is available on Pin 23 (V
drive an external power stage.
The gain of this stage is typically 25% depending
on its register value.
The DC value of this ramp is driven by its own I
r eg is t e r (ve rtic a l P o sit ion ). I ts v a lue is
V
The V
V
varies.
By using the vertical moire, V
lated from frame to frame. This function is intended
to correct slightly the vertical video line to line
period from actual CRT line to line width.
III.7 - Basic Equations
In first approximation,the amplitude of the ramp on
Pin 23 (Vout) is :
with V
value of the ramp on Pin 22
V
V
value and +1 for maximum
On V
with VPOS equals -1 for minimum vertical position
register value and +1 for maximum
The current available on Pin 22 is :
with C
f : synchronization frequency
CDOUT
OUT
OSC
AMP
V
OUT
. It increases the accuracy when temperature
DCOUT
DCOUT
= V
is -1 for minimum vertical amplitude register
MID
OSC
- V
= 7/16 V
22
= 7/16 V
MID
V
: capacitor connected on Pin 22
, the voltage (in volts) is calculated by :
, ramp with fixed amplitude
DCOUT
voltage is correlated with DC value of
I
OSC
= (V
REF
OSC
= V
3
8
REF
MID
- V
V
300mV.
; typically 3.5V, the middle
REF
MID
+ 0.3 (VPOS)
) (1 + 0.25 (V
DCOUT
C
OSC
can be modu-
f
TDA9110
AMP
OUT
23/29
) to
))
2
C