CY28158PVC Cypress Semiconductor Corp, CY28158PVC Datasheet - Page 5

• Manufacturer Part Number: CY28158PVC
• Description: PLL Clock Generator Dual 100MHz to 133MHz 56-Pin SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: PLL Clock Generatorr

Specifications of CY28158PVC

• Package: 56SSOP
• Number Of Elements Per Chip: 2
• Output Frequency Range: 16.67 to 133.33 MHz
• Operating Temperature: 0 to 70 °C
• Operating Supply Voltage: 3.3 V

Electrical Characteristics
Document #: 38-07039 Rev. *B
I
I
I
Switching Characteristics
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
DD3
DDPD2
DDPD3
1
2
2
2
3
3
3
6
8
9
10
11
12
13
Parameter
4.
5.
6.
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
All parameters specified with loaded outputs.
Duty cycle is measured at 1.5V when V
3.3V Power Supply Cur-
rent
2.5V Shutdown Current
3.3V Shutdown Current
All
CPU,
IOAPIC
48MHZ, REF
PCI, 3V66
CPU,
IOAPIC
48MHZ, REF
PCI, 3V66
CPU
IOAPIC
3V66
PCI
CPU, 3V66
3V66, PCI
CPU, IOAPIC
CPU
IOAPIC
48MHZ
3V66
REF
CPU, PCI
Output
Description
Output Duty Cycle
Rising Edge Rate
Rising Edge Rate
Rising Edge Rate
Falling Edge Rate
Falling Edge Rate
Falling Edge Rate
CPU-CPU Skew
IOAPIC-IOAPIC Skew
3V66-3V66 Skew
PCI-PCI Skew
CPU-3V66 Clock Skew
3V66-PCI Clock Skew
CPU-IOAPIC Clock Skew
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Settle Time
Over the Operating Range (continued)
[5]
DD
Over the Operating Range
= 3.3V. When V
Description
V
V
V
DDA
DDA
DDA
/V
/V
/V
DD33
DD33
DD33
DD
[6]
= 2.5V, duty cycle is measured at 1.25V.
= 3.465V, V
= 3.465V, V
= 3.465V, V
t
Between 0.4V and 2.0V
Between 0.4V and 2.4V
Between 0.4V and 2.4V
Between 2.0V and 0.4V
Between 2.4V and 0.4V
Between 2.4V and 0.4V
Measured at 1.25V
Measured at 1.25V
Measured at 1.5V
Measured at 1.5V
CPU leads. Measured at 1.25V for
2.5V clocks and 1.5V for 3.3V clocks
3V66 leads. Measured at 1.5V
CPU leads. Measured at 1.25V
With all outputs running
CPU and PCI clock stabilization from
power-up
1A
/t
Test Conditions
DD25
DD25
DD25
1B
= 2.625V, F
= 2.625V
= 2.625V
Test Conditions
CPU
= 133 MHz
Min.
1.0
0.5
1.0
1.0
0.5
1.0
0.5
1.5
45
0
Min. Max. Unit
Max.
1000
175
250
250
500
150
500
500
500
4.0
2.0
4.0
4.0
2.0
4.0
1.5
2.5
CY28158
55
4
3
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160
100
200
V/ns
V/ns
V/ns
V/ns
V/ns
V/ns
Unit
ms
ps
ps
ps
ps
ns
ns
ns
ps
ps
ps
ps
ps
%
mA
µA
µA