LE77D112BTC Zarlink, LE77D112BTC Datasheet - Page 8

• Manufacturer Part Number: LE77D112BTC
• Description: SLIC 1-CH 63dB 3.3V 44-Pin eTQFP Tray
• Manufacturer: Zarlink

Specifications of LE77D112BTC

• Package: 44eTQFP
• Number Of Channels Per Chip: 1
• Polarity Reversal: Yes
• Longitudinal Balanced: 63 dB
• Minimum Operating Supply Voltage: 3.135 V
• Typical Operating Supply Voltage: 3.3 V

where 2 • R
gain from V
reveals that Z
impedance is 600 Ω. This is the configuration used in this data sheet for defining the device specifications. However, in a real
application, R
worldwide requirements using the programmable filters of the Le78D11 VoSLAC device.
Two-Wire to Four-Wire Gain (G
The two-wire to four-wire gain is the gain from the phone line to the VOUT output of the Le77D11 VoSLIC device. To solve for
G
Using the values of R
Four-Wire to Two-Wire Gain (G
G
where K
this circuit is 7.3 dB.
Note:
Equation derivations can be found in the Zarlink Le77D11/Le78D11 Chip Set User’s Guide (document ID# 080716).
Note:
* denotes external components
24
42
, the VIN pin is grounded (see
is the gain from the VIN input to the line. This gain is defined as V
V
AB
IN
is the gain from VIN to V
F
OUT
is the total resistance of the external fuse resistors in the circuit, R
2WIN
F
R
= 50 Ω is recommended, producing a total input impedance of 700 Ω which is a good starting point for meeting
to V
L
*
or
or
is a function of the selectable resistors, R
AB
R
R
IMT
I
, and K
L
F
F
*
*
and R
B
V
A
i
i
is the voice current gain defined in the Transmission Specifications Table. Note that the equation
F
from the application example, G
Figure
AB
24
42
R
. Using the values of R
R
)
)
S
S
G
7).
Figure 7.
42
=
G
Sense
–
24
V
--------- -
20
V
K
V
------------- -
AB
IN
V
=
log
v
OUT
AB
Zarlink Semiconductor Inc.
–
=
20






Transmission Block Diagram
-------------------------------------------------- -


G
=
1
log
K
42
CFILT
+
G
IN
IMT
K
---------------------------------- -


24
=


K
OUT
IMT
----------------------- -
R
R
OUT
--------------------------------------------------


and R
=
L
L
1
8
i
K
+
R
+
R
-----------------------------------------
------------------- -
K
+
and R
C
IN
+
24
L
2R
2R
IMT
V
2R
K
---------------------------------- -
HPi


R
------------------- -
K
OUT
----------------------- -
R
R
for this circuit is –10.9 dB.
F
F
F
V
IMT
2R
K
F
*
. For example, if R


L
L
R
V
VHP
AB
F
R
+
+
1
R


IMT
F
+






from the application example and R
L
2R
2R
/V
IMT
K
 in dB

in dB
i
IN
OUT
F
F
K


.
V
R


IMT
IMTi
*
is the impedance setting resistor, K
VOUT
F
= 0 Ω and R
i
IMT
is 100 k, the terminating
L
= 600 Ω, G
VIN
OUT
i
42
is the
for