CS5507-AS Cirrus Logic Inc, CS5507-AS Datasheet - Page 10

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CS5507-AS

Manufacturer Part Number
CS5507-AS
Description
ADC Single Delta-Sigma 100SPS 16-Bit Serial 20-Pin SOIC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5507-AS

Package
20SOIC
Resolution
16 Bit
Sampling Rate
100 SPS
Architecture
Delta-Sigma
Number Of Analog Inputs
1
Digital Interface Type
Serial
Input Type
Voltage
Polarity Of Input Voltage
Unipolar|Bipolar

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10
3.3V SWITCHING CHARACTERISTICS
5%; VA- = -5V ± 10%; Input Levels: Logic 0 = 0V, Logic 1 = VD+; C
10
SSC Mode (M/SLP = VD+)
Access Time:
SDATA Delay Time:
SCLK Delay Time
Serial Clock (Out)
Output Float Delay:
SEC Mode (M/SLP = DGND)
Serial Clock (In)
Serial Clock (In)
Access Time:
Maximum Delay time:
Output Float Delay:
CS Low to SDATA out (DRDY = low)
Parameter
CS high to output Hi-Z (Note 16)
CS high to output Hi-Z (Note 16)
DRDY falling to MSB (CS = low)
CS Low to data valid (Note 17)
SDATA MSB bit to SCLK rising
SCLK falling to next SDATA bit
SCLK falling to new SDATA bit
SCLK falling to SDATA Hi-Z
SCLK rising to SDATA Hi-Z
Pulse Width High
Pulse Width High
Pulse Width Low
Pulse Width Low
(Note 18)
(T
A
= T
Symbol
MIN
t
t
f
t
t
t
t
t
csd1
csd2
t
t
t
t
t
t
t
dd1
ph1
sclk
ph2
dd2
cd1
dfd
fd1
fd2
fd3
fd4
pl1
pl2
to T
L
= 50 pF.) (Note 2)
MAX
Min
200
200
0
-
-
-
-
-
-
-
-
-
-
-
-
VA+ = 5V ± 10%; VD+ = 3.3V ±
2/f
1/f
1/f
1/f
1/f
Typ
265
100
400
320
70
-
-
-
-
-
clk
clk
clk
clk
clk
CS5505/6/7/8
CS5505/6/7/8
2/fclk
3/f
2/f
Max
1.25
400
200
600
150
500
-
-
-
-
-
-
clk
clk
DS59F4
DS59F5
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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