74FCT88915TT100PY Integrated Device Technology (Idt), 74FCT88915TT100PY Datasheet - Page 10

• Manufacturer Part Number: 74FCT88915TT100PY
• Description: LOW SKEW PLL CLK DRIVER
• Manufacturer: Integrated Device Technology (Idt)

TEST CIRCUITS AND WAVEFORMS
NOTES:
1. The FCT88915TT aligns rising edges of the FEEDBACK input and SYNC input. Therefore, the SYNC input does not require a 50% duty cycle.
2. All skew specs are measured between the V
3. If a Q output is connected to the FEEDBACK input (this situation is not shown), the Q output frequency would match the SYNC input frequency, the 2Q output would run at twice
IDT74FCT88915TT
LOW SKEW PLL-BASED CMOS CLOCK DRIVER
the SYNC frequency, and the Q/2 output would run at half the SYNC frequency.
Generator
Pulse
Q/2 OUTPUT
Q5 OUTPUT
SYNC IN PUT
(SYNC (1) or
SYNC (0))
2Q OUTPUT
FEED BACK
INPUT
Q0-Q4
OUTPUTS
t
V
SK EW A LL
IN
Test Circuits For All Outputs
R
T
D.U.T.
V
CC
CC
V
/2 crossing point of the appropriate output edges. All skews are specified as "windows", not as ± deviation around a center point.
OUT
t
(These waveforms represent the configuration shown in Figure 4a)
PD
t
SKEW f
50pF
C
L
Propagation Delay, Output Skew
t
500
C YC LE SYN C IN PU T
Ω
t
SKEW r
10
t
C YC LE "Q" OU TP UTS
t
SKE W f
COMMERCIAL TEMPERATURE RANGE
t
SKE W r
1.5V
1.5V
1.5V
1.5V
1.5V
1.5V