MACH445-15YC Lattice, MACH445-15YC Datasheet - Page 20

• Manufacturer Part Number: MACH445-15YC
• Description: CPLD MACH 4 Family 128 Macro Cells 47.6MHz EECMOS Technology 5V 100-Pin PQFP Tray
• Manufacturer: Lattice

Specifications of MACH445-15YC

• Package: 100PQFP
• Family Name: MACH 4
• Number Of Macro Cells: 128
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 47.6 MHz
• Number Of Product Terms Per Macro: 20
• Memory Type: EEPROM
• Re-programmability Support: Yes
• Operating Temperature: 0 to 70 °C

Combinatorial
Registered
SWITCHING WAVEFORMS
20
Input, I/O,
Notes:
1. V
2. Input pulse amplitude 0 V to 3.0 V.
3. Input rise and fall times 2 ns–4 ns typical.
or Feed-
Registered
Output
Clock
Register
back
T
Output
Clock
Clock
Input
= 1.5 V.
Input
Registered Input (MACH 2 and 4)
Registered Output
t
WH
Clock Width
t
S
Combinatorial
t
SIR
Input, I/O, or
Feedback
Output
V
T
t
t
WL
CO
V
T
t
ICO
t
H
V
T
17468E-11
t
HIR
V
MACH445-12/15/20
V
17468E-9
T
T
17468E-13
V
T
Combinatorial Output
Input, I/O, or
Feedback
Latched
Registered
Gate
V
Out
Register
Register
T
Gate
Output
t
PD
Clock
Clock
Input
Input
Input Register to Output Register Setup
Latched Output (MACH 2, 3, and 4)
t
PDL
V
T
Gate Width (MACH 2, 3, and 4)
17468E-8
(MACH 2 and 4)
V
T
t
SL
t
GWS
V
t
ICS
T
t
V
HL
T
V
V
T
T
V
17468E-12
T
17468E-10
17468E-14
t
GO
V
T