CX28229G-14 Mindspeed Technologies, CX28229G-14 Datasheet - Page 102
CX28229G-14
Manufacturer Part Number
CX28229G-14
Description
ATM IMA 800Mbps 1.8V/3.3V 256-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28229G-14.pdf
(271 pages)
Specifications of CX28229G-14
Package
256BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3 V
Maximum Operating Supply Voltage
1.89|3.6 V
Maximum Output Rate
800 Mbps
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Registers
Table 7-2. Device Control and Status Registers
Table 7-3. Port Control and Status Registers (1 of 3)
7-2
Port Offset
Address
Address
0x0200
0x0201
0x0202
0x0203
0x0204
0x0205
0x0208
0x0A
0x0B
0x0C
0x0D
0x00
0x01
0x02
0x03
0x04
0x05
0x08
0x09
0x0E
MODE
PHYINTFC
ATMINTFC
OUTSTAT
SUMPORT
ENSUMPORT
PART/VER
SUMINT
ENSUMINT
PMODE
IOMODE
CGEN
HDRFIELD
IDLPAY
ERRPAT
CVAL
UTOP1
UTOP2
Name
Name
—
—
The device level registers in
operating modes, as well as status and control for summary interrupts.
The registers listed in
used to determine the exact address of a specific register in a specific port. All
numbers are in hexadecimal.
1.
2.
Add the port offset address to the port base address as shown in
example:
For Port 3, IOMODE register
00C0 (Port 3 base address) + 0x05 (port offset address) = 00C5
Use the following formula:
0x40 (port register map size) × n (port number) + port offset address = exact
register address
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
Type
R/W
R/W
R/W
R/W
R/W
R
R
R
One-second
Mindspeed Technologies
Latching
Latching
OneSec
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Table 7-3
Summary Interrupt Status Register
Summary Interrupt Control Register
Reserved, set to a logical 0
Reserved, set to a logical 0
Port Mode Control Register
Input/Output Mode Control Register
Cell Generation Control Register
Header Field Control Register
Transmit Idle Cell Payload Control Register
Error Pattern Control Register
Cell Validation Control Register
UTOPIA Control Register 1
UTOPIA Control Register 2
Device Mode Control Register
PHY-side Interface Control Register
Output Status Control Register
Summary Port Interrupt Status Register
Summary Port Interrupt Control Register
Part Number/Version Register
ATM-side Interface Control Register
Table 7-2
are replicated for each port. Two methods can be
provide control for the device’s major
Description
™
Description
CX28224/5/9 Data Sheet
Table
28229-DSH-001-D
7-1. For
page 7-33
page 7-34
page 7-35
page 7-36
page 7-37
page 7-38
page 7-38
page 7-39
page 7-39
page 7-40
page 7-40
page 7-64
page 7-65
page 7-65
page 7-65
page 7-66
page 7-66
page 7-67
Number
Number
Page
Page
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