XC2VP70-7FF1517C Xilinx Inc, XC2VP70-7FF1517C Datasheet - Page 97
![no-image](/images/no-image-200.jpg)
XC2VP70-7FF1517C
Manufacturer Part Number
XC2VP70-7FF1517C
Description
FPGA Virtex-II Pro Family 74448 Cells 1350MHz 0.13um/90nm (CMOS) Technology 1.5V 1517-Pin FCBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2VP20-5FGG676C.pdf
(430 pages)
Specifications of XC2VP70-7FF1517C
Package
1517FCBGA
Family Name
Virtex-II Pro
Device Logic Units
74448
Number Of Registers
66176
Maximum Internal Frequency
1350 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
964
Ram Bits
6045696
Re-programmability Support
Yes
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IOB Output Switching Characteristics Standard Adjustments
Table 35
C
standards, adjust the delays by the values shown.
Table 35: IOB Output Switching Characteristics Standard Adjustments
DS083 (v4.7) November 5, 2007
Product Specification
LVTTL (Low-Voltage Transistor-Transistor Logic), Slow, 2 mA
LVTTL, Slow, 4 mA
LVTTL, Slow, 6 mA
LVTTL, Slow, 8 mA
LVTTL, Slow, 12 mA
LVTTL, Slow, 16 mA
LVTTL, Slow, 24 mA
LVTTL, Fast, 2 mA
LVTTL, Fast, 4 mA
LVTTL, Fast, 6 mA
LVTTL, Fast, 8 mA
LVTTL, Fast, 12 mA
LVTTL, Fast, 16 mA
LVTTL, Fast, 24 mA
LVCMOS (Low-Voltage CMOS), 3.3V, Slow, 2 mA
LVCMOS, 3.3V, Slow, 4 mA
LVCMOS, 3.3V, Slow, 6 mA
LVCMOS, 3.3V, Slow, 8 mA
LVCMOS, 3.3V, Slow, 12 mA
LVCMOS, 3.3V, Slow, 16 mA
LVCMOS, 3.3V, Slow, 24 mA
LVCMOS, 3.3V, Fast, 2 mA
LVCMOS, 3.3V, Fast, 4 mA
LVCMOS, 3.3V, Fast, 6 mA
LVCMOS, 3.3V, Fast, 8 mA
LVCMOS, 3.3V, Fast, 12 mA
LVCMOS, 3.3V, Fast, 16 mA
LVCMOS, 3.3V, Fast, 24 mA
LVCMOS, 2.5V, Slow, 2 mA
LVCMOS, 2.5V, Slow, 4 mA
LVCMOS, 2.5V, Slow, 6 mA
LVCMOS, 2.5V, Slow, 8 mA
LVCMOS, 2.5V, Slow, 12 mA
LVCMOS, 2.5V, Slow, 16 mA
LVCMOS, 2.5V, Slow, 24 mA
LVCMOS, 2.5V, Fast, 2 mA
LVCMOS, 2.5V, Fast, 4 mA
REF
. Output delays terminating at a pad are specified for LVCMOS25 with 12 mA drive and fast slew rate. For other
gives all standard-specific adjustments for output delays terminating at pads, based on standard capacitive load,
R
Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
www.xilinx.com
LVCMOS33_S12
LVCMOS33_S16
LVCMOS33_S24
LVCMOS33_F12
LVCMOS33_F16
LVCMOS33_F24
LVCMOS25_S12
LVCMOS25_S16
LVCMOS25_S24
IOSTANDARD
LVCMOS33_S2
LVCMOS33_S4
LVCMOS33_S6
LVCMOS33_S8
LVCMOS33_F2
LVCMOS33_F4
LVCMOS33_F6
LVCMOS33_F8
LVCMOS25_S2
LVCMOS25_S4
LVCMOS25_S6
LVCMOS25_S8
LVCMOS25_F2
LVCMOS25_F4
LVTTL_S12
LVTTL_S16
LVTTL_S24
LVTTL_F12
LVTTL_F16
LVTTL_F24
Attribute
LVTTL_S2
LVTTL_S4
LVTTL_S6
LVTTL_S8
LVTTL_F2
LVTTL_F4
LVTTL_F6
LVTTL_F8
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OLVCMOS33_S12
OLVCMOS33_S16
OLVCMOS33_S24
OLVCMOS33_F12
OLVCMOS33_F16
OLVCMOS33_F24
OLVCMOS25_S12
OLVCMOS25_S16
OLVCMOS25_S24
OLVCMOS33_S2
OLVCMOS33_S4
OLVCMOS33_S6
OLVCMOS33_S8
OLVCMOS33_F2
OLVCMOS33_F4
OLVCMOS33_F6
OLVCMOS33_F8
OLVCMOS25_S2
OLVCMOS25_S4
OLVCMOS25_S6
OLVCMOS25_S8
OLVCMOS25_F2
OLVCMOS25_F4
Parameter
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OLVTTL_S12
OLVTTL_S16
OLVTTL_S24
OLVTTL_F12
OLVTTL_F16
OLVTTL_F24
OLVTTL_S2
OLVTTL_S4
OLVTTL_S6
OLVTTL_S8
OLVTTL_F2
OLVTTL_F4
OLVTTL_F6
OLVTTL_F8
Timing
–0.01
–0.07
5.42
3.09
2.26
1.47
1.02
0.46
0.37
4.42
1.95
1.10
0.40
0.24
0.05
5.42
3.14
2.26
1.47
1.03
0.45
0.39
4.46
1.96
1.11
0.41
0.23
0.02
4.12
2.43
1.76
1.04
0.76
0.41
0.23
3.29
1.31
-7
Speed Grade
–0.01
–0.08
6.24
3.55
2.60
1.69
1.18
0.53
0.42
5.09
2.24
1.26
0.46
0.27
0.06
6.23
3.61
2.60
1.69
1.18
0.52
0.44
5.13
2.25
1.28
0.47
0.26
0.02
4.74
2.80
2.02
1.19
0.87
0.47
0.26
3.78
1.50
-6
–0.01
–0.09
6.86
3.91
2.86
1.86
1.29
0.58
0.47
5.59
2.46
1.39
0.51
0.30
0.07
6.86
3.97
2.86
1.86
1.30
0.57
0.49
5.64
2.48
1.40
0.52
0.28
0.03
5.21
3.07
2.22
1.31
0.96
0.52
0.28
4.16
1.65
-5
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
26
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