XC3142A-3PQ100I Xilinx Inc, XC3142A-3PQ100I Datasheet - Page 58

• Manufacturer Part Number: XC3142A-3PQ100I
• Description: FPGA XC3100A Family 3K Gates 144 Cells 270MHz CMOS Technology 5V 100-Pin PQFP
• Manufacturer: Xilinx Inc

Specifications of XC3142A-3PQ100I

• Package: 100PQFP
• Family Name: XC3100A
• Device Logic Units: 144
• Device System Gates: 3000
• Number Of Registers: 480
• Maximum Internal Frequency: 270 MHz
• Typical Operating Supply Voltage: 5 V
• Maximum Number Of User I/os: 82
• Ram Bits: 30784
• Re-programmability Support: Yes

XC3000 Series Field Programmable Gate Arrays
XC3100L Absolute Maximum Ratings
Note:
XC3100L Global Buffer Switching Characteristics Guidelines
Notes:
7-60
Global and Alternate Clock Distribution
Either:Normal IOB input pad through clock buffer
Or: Fast (CMOS only) input pad through clock
TBUF driving a Horizontal Longline (L.L.)
BIDI
I to L.L. while T is Low (buffer active)
T to L.L. active and valid with single pull-up resistor
T to L.L. High with single pull-up resistor
Symbol
T
T
Bidirectional buffer delay
V
to any CLB or IOB clock input
V
V
STG
T
SOL
CC
TS
IN
1. Timing is based on the XC3142L, for other devices see timing calculator.
2. The use of two pull-up resistors per longline, available on other XC3000 devices, is not a valid option for XC3100L devices.
J
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended
periods of time may affect device reliability.
buffer to any CLB or IOB clock input
Supply voltage relative to GND
Input voltage with respect to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Maximum soldering temperature (10 s @ 1/16 in.)
Junction temperature plastic
Junction temperature ceramic
Description
1
1
Description
Speed Grade
Symbol
T
T
T
T
T
T
PIDC
PUS
BIDI
PID
ON
IO
Max
11.4
November 9, 1998 (Version 3.1)
5.6
4.3
3.1
4.2
1.0
-3
–0.5 to V
–0.5 to V
–0.5 to +7.0
–65 to +150
Advance
+260
+125
+150
CC
CC
11.4
Max
4.7
3.7
3.1
4.2
0.9
-2
+0.5
+0.5
Units
Units
ns
ns
ns
ns
ns
ns
V
V
V
C
C
C
C
R