STW51000AT STMicroelectronics, STW51000AT Datasheet

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STW51000AT

Manufacturer Part Number
STW51000AT
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STW51000AT

Lead Free Status / Rohs Status
Supplier Unconfirmed
1
2
April 2005
This is preliminary information on a new product now in development. Details are subject to change without notice.
Super Integrated SoC including 2 x ST140 quad
MAC DSP engines running at 600MHz and 1 x
ARM926 Micro Controller running at 300MHz
Double Quad-MAC units
Double Quad-ALU (32 and 40-bit)
4800 MMacs/s - 29000 Mops - 7500 Mips
Convolutional Decoder Engine:
– 256 x 12.2 kpbs AMR voice users
– Programmable Code Parameters to support
Turbo Decoder Engine:
– 28 x 384 kbps (8 iterations)
– Programmable Code Parameters to support
– Includes CRC Processing
– Hardware Interleaver with multi-standard
Two 32-channel DMA Engines
16Mbit Central Memory shared among DSPs,
µC and DMA Engines
One 32-bit External Memory Controller
One external Master Interface
One 32-bit Communication Interface
Two Multi-Channel Serial Ports
Two Ethernet MAC
One 16-bit UTOPIA Level 2 Interface
32-bit General Purpose I/Os
Two 32-bit Timers
Programmable PLL Clock Generator
IEEE-1149.1 (JTAG)
Development tools available
Baseband modem SW deliverables available
32-bit Load/Store Architecture
16-bit, 32-bit or 128-bit (SLIW) Instruction Set for
high performance / high code density trade off
Product Features
multi-standards
CDMA2000 and EDGE)
multi-standards (W-CDMA, TD-SCDMA and
CDMA2000)
support
ST140 Features
(W-CDMA,
TD-SCDMA,
SUPER INTEGRATED DSP ENGINE
3
Figure 1. Package
Table 1. Order Codes
Conditional Instructions to reduce code size and
overhead
Built-in Coprocessor Interfaces for highly
optimized Instruction Definition
Compiler Friendly Instruction Set for high
performance critical DSP Routines directly from
C
8, 16, 32 and 40-bit Data Support
Circular and bit-reversed Data addressing
modes
32x16 bit Multiplier eases floating point to fixed
point conversion
8-bit Overflow protection
Bit Manipulation
Normalization, Saturation
Zero Overhead Loops
32Kbytes L1 Program Cache and 64Kbytes L1
Data Cache
32/16-bit RISC Architecture
32-bit ARM Instruction Set for maximum
performance and flexibility
16-bit Thumb Instruction set for high code
density
Built-in Memory Management Unit for OS
Support
32Kbytes L1 Program Cache
16KBytes L1 Data Cache
ARM926 Features
STW51000AT
Part Number
PBGA/HSP-569
GreenSIDE
STW51000
PBGA/HSP-569
Package
DATA BRIEF
Rev. 2
1/8

Related parts for STW51000AT

STW51000AT Summary of contents

Page 1

... This is preliminary information on a new product now in development. Details are subject to change without notice. SUPER INTEGRATED DSP ENGINE Figure 1. Package Table 1. Order Codes Part Number TD-SCDMA, STW51000AT Conditional Instructions to reduce code size and ■ overhead Built-in Coprocessor Interfaces for highly ■ ...

Page 2

GreenSIDE - STW51000 4 Overview/Description GreenSIDE is a cost-effective, System-on-Chip device that targets applications in wireless infrastructure equipment. The device combines two quad-MAC ST140 DSP cores, a standard ARM926-EJS RISC pro- cessor core providing a total of 29000 Mops, 7500 ...

Page 3

The GreenSIDE bus architecture is based on the Multi-Layer AHB (Transfer Cross Bar). This bus archi- tecture provides a large amount of bandwidth in the system, and prevents the bus architecture from being a bottleneck. A 16Mbit memory provides a ...

Page 4

... GreenSIDE - STW51000 8 Wireless Development Library STMicroelectronics provides a complete set of libraries that implement complete Layer 1 of wireless stan- dards such as EDGE, WCDMA FDD Release TD-SCDMA, CDMA2000 1xEV-DO, 1xEV-DV, op- timized for the GreenSIDE device and platform. 9 NODE B - GreenSIDE Implementation Examples Figure 3. W-CDMA Node-B (1-Carrier, 96 voice users chip-based ...

Page 5

... Development Support STMicroelectronics provides a complete set of development tools around the GreenSIDE Super Integrat- ed DSP Engine, to evaluate the performance, and to develop, debug, and integrate Application Code on the chip via an ARM/DSP environment, providing multi-Core Development/Debug capabilities. 10.1 Software Development Tools: Software Development Tools for ARM and ST140 include an Integrated Development Environment tool, the C/C++ Compiler, Assembler and Linker Code Generation, the Instruction Set Simulator and the OS- aware Debugger application for Simulation and Emulation Debug ...

Page 6

GreenSIDE - STW51000 11 Package Information Figure 5. PBGA/HSP-569 (40x40x2.46mm) Mechanical Data & Package Dimensions mm DIM. MIN. TYP. MAX. A 2.46 A1 0.36 A2 1.73 b 0.60 0.75 0.90 D 39.80 40.00 40.20 D1 38.10 D2 34.50 E 39.80 ...

Page 7

Revision History Table 3. Revision History Date Revision 22-mar-2005 04-apr-2005 1 First Issue. 2 Updated the Section 1 first point “Micro Controller”. Updated the Section 7 “PrimeXSys™”. GreenSIDE - STW51000 Description of Changes 7/8 ...

Page 8

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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